| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 811 /// SEXTLOAD loads the integer operand and sign extends it to a larger
820 SEXTLOAD, enumerator in enum:llvm::ISD::LoadExtType
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| H A D | SelectionDAGNodes.h | 2278 /// Returns true if the specified node is a SEXTLOAD.
2281 cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
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| /external/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 153 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
155 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand);
156 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand);
157 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand);
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| /external/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 139 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
140 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Legal);
141 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Legal);
142 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand);
156 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v8i16, Expand);
157 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v16i16, Expand);
560 ISD::LoadExtType ExtTy = Signed ? ISD::SEXTLOAD : ISD::ZEXTLOAD;
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| H A D | R600ISelLowering.cpp | 134 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
135 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Custom);
136 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Custom);
1560 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) {
1689 // Ext = In.Flags.isSExt() ? ISD::SEXTLOAD : ISD::ZEXTLOAD;
1690 Ext = ISD::SEXTLOAD;
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| H A D | AMDGPUISelLowering.cpp | 186 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, VT, Expand);
192 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand);
195 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand);
198 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand);
201 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Expand);
1463 if (ExtType == ISD::SEXTLOAD) {
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 82 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
84 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand);
85 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand);
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 429 if (LD->getValueType(0) == MVT::i64 && ExtType == ISD::SEXTLOAD)
639 LD->getExtensionType() != ISD::SEXTLOAD ||
665 LD->getExtensionType() != ISD::SEXTLOAD ||
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| H A D | HexagonISelLowering.cpp | 918 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
1708 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 502 case ISD::SEXTLOAD: OS << ", sext"; break;
|
| H A D | DAGCombiner.cpp | 3202 if (LN0->getExtensionType() != ISD::SEXTLOAD &&
5905 N->getOpcode() == ISD::SIGN_EXTEND ? ISD::SEXTLOAD : ISD::ZEXTLOAD;
6029 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, N0.getValueType()))) {
6038 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT,
6064 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, MemVT)) {
6065 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(N), VT,
6084 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, N0.getValueType()) &&
6094 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(LN0), VT,
6379 if (LN0->getExtensionType() != ISD::SEXTLOAD && LN0->isUnindexed()) {
6737 ExtType = ISD::SEXTLOAD;
[all...] |
| H A D | LegalizeVectorOps.cpp | 605 case ISD::SEXTLOAD:
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| H A D | LegalizeIntegerTypes.cpp | 492 N->getMemOperand(), ISD::SEXTLOAD);
2024 if (ExtType == ISD::SEXTLOAD) {
2100 Hi = DAG.getNode(ExtType == ISD::SEXTLOAD ? ISD::SRA : ISD::SRL, dl, NVT,
|
| H A D | LegalizeDAG.cpp | 995 if (ExtType == ISD::SEXTLOAD)
1175 if (ExtType == ISD::SEXTLOAD)
3726 ISD::SEXTLOAD, dl, PTy, Chain, Addr,
|
| /external/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 186 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD})
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 140 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
756 setLoadExtAction(ISD::SEXTLOAD, InnerVT, VT, Expand);
889 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Custom);
890 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Custom);
891 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v8i8, Custom);
985 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Custom);
986 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Custom);
987 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Custom);
991 setLoadExtAction(ISD::SEXTLOAD, MVT::v8i16, MVT::v8i8, Legal);
992 setLoadExtAction(ISD::SEXTLOAD, MV
[all...] |
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 131 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
133 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand);
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 242 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
418 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, MVT::i32, Custom);
1597 DAG.getExtLoad(ISD::SEXTLOAD, DL, PTy, Chain, Addr,
2225 if ((VT == MVT::i32) || (ExtType == ISD::SEXTLOAD) ||
|
| /external/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 230 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
2172 ISD::SEXTLOAD : ISD::ZEXTLOAD;
2298 ISD::SEXTLOAD : ISD::ZEXTLOAD;
4006 if (ExtType == ISD::SEXTLOAD) {
|
| H A D | NVPTXISelDAGToDAG.cpp | 703 // Sign : ISD::SEXTLOAD
711 if ((LD->getExtensionType() == ISD::SEXTLOAD))
931 // Sign : ISD::SEXTLOAD
942 if (ExtensionType == ISD::SEXTLOAD)
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 241 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
274 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand);
1580 if (Load->getExtensionType() == ISD::SEXTLOAD) {
1613 ISD::SEXTLOAD :
1641 case ISD::SEXTLOAD:
1797 (Type == ISD::SEXTLOAD && C.ICmpType != SystemZICMP::UnsignedOnly)) {
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1060 else if (ExtType == ISD::SEXTLOAD)
1070 if (ExtType == ISD::SEXTLOAD) {
1083 if (ExtType == ISD::SEXTLOAD) {
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 1497 Opcode = (LD->getExtensionType() == ISD::SEXTLOAD)
1501 if (LD->getExtensionType() == ISD::SEXTLOAD) {
1550 bool isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD;
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1456 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Expand);
1460 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, VT, Expand);
1490 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 2503 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD;
2539 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD;
|