Searched refs:STM (Results 1 - 17 of 17) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUAsmPrinter.cpp95 const AMDGPUSubtarget &STM = MF->getSubtarget<AMDGPUSubtarget>(); local
97 if (STM.isAmdHsaOS()) {
105 const AMDGPUSubtarget &STM = MF->getSubtarget<AMDGPUSubtarget>(); local
106 if (MFI->isKernel() && STM.isAmdHsaOS()) {
174 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); local
176 if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
178 if (!STM.isAmdHsaOS()) {
185 AMDGPU::IsaVersion ISA = STM.getIsaVersion();
203 if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
241 if (STM
261 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); local
320 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); local
535 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); local
573 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); local
[all...]
H A DSILoadStoreOptimizer.cpp426 const TargetSubtargetInfo &STM = MF.getSubtarget(); local
427 TRI = static_cast<const SIRegisterInfo *>(STM.getRegisterInfo());
428 TII = static_cast<const SIInstrInfo *>(STM.getInstrInfo());
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUAsmPrinter.cpp41 const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>(); local
42 if (STM.dumpCode()) {
46 if (STM.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
H A DAMDILISelLowering.cpp101 const AMDGPUSubtarget &STM = getTargetMachine().getSubtarget<AMDGPUSubtarget>(); local
173 if (STM.device()->isSupported(AMDGPUDeviceInfo::LongOps)) {
187 if (STM.device()->isSupported(AMDGPUDeviceInfo::DoubleOps)) {
/external/llvm/lib/IR/
H A DDataLayout.cpp560 StructLayoutMap *STM = static_cast<StructLayoutMap*>(LayoutMap);
561 StructLayout *&SL = (*STM)[Ty];
/external/llvm/utils/TableGen/
H A DDAGISelMatcherEmitter.cpp756 } else if (const SwitchTypeMatcher *STM = dyn_cast<SwitchTypeMatcher>(M)) {
757 for (unsigned i = 0, e = STM->getNumCases(); i != e; ++i)
758 BuildHistogram(STM->getCaseMatcher(i), OpcodeFreq);
/external/libunwind_llvm/src/
H A DUnwindRegistersSave.S313 @ . the pc (r15) cannot be in the list in an STM instruction
/external/llvm/test/MC/ARM/
H A Dthumb-diagnostics.s119 @ Invalid writeback and register lists for STM
H A Ddiagnostics.s285 @ Out of order STM registers
488 @ CHECK-ERRORS: error: system STM cannot have writeback register
H A Dbasic-thumb-instructions.s518 @ STM
H A Dv8_IT_manual.s609 @ STM, encoding T1
613 @ STM, encoding T2 (32-bit)
617 @ STM, encoding T3 (32-bit)
H A Dbasic-arm-instructions.s2832 @ STM*
/external/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp887 // Fallback to STM instruction, which has existed since the dawn of
1233 MachineInstrBuilder LDM, STM; local
1244 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA_UPD
1249 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA : ARM::STMIA));
1253 AddDefaultPred(STM.addOperand(MI->getOperand(2)));
1269 STM.addReg(Reg, RegState::Kill);
2975 // Return the number of 32-bit words loaded by LDM or stored by STM. If this
/external/v8/src/s390/
H A Dconstants-s390.h842 STM = 0x90, // Store Multiple (32) enumerator in enum:v8::internal::Opcode
H A Dsimulator-s390.h597 EVALUATE(STM);
H A Dsimulator-s390.cc865 EvalTable[STM] = &Simulator::Evaluate_STM;
2906 case STM:
2924 if (op == STM) {
7195 EVALUATE(STM) {
7196 DCHECK_OPCODE(STM);
H A Dassembler-s390.cc537 rs_form(STM, r1, r2, src.rb(), src.offset());

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