/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | R600InstrInfo.h | 106 int getInstrLatency(const InstrItineraryData *ItinData, 110 virtual int getInstrLatency(const InstrItineraryData *ItinData, function in class:llvm::R600InstrInfo
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H A D | R600InstrInfo.cpp | 470 int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData, function in class:R600InstrInfo
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/external/llvm/lib/CodeGen/ |
H A D | TargetSchedule.cpp | 175 unsigned InstrLatency = TII->getInstrLatency(&InstrItins, DefMI); 257 return TII->getInstrLatency(&InstrItins, MI);
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H A D | TargetInstrInfo.cpp | 998 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, function in class:TargetInstrInfo 1046 getInstrLatency(const InstrItineraryData *ItinData, function in class:TargetInstrInfo 1086 // Let the target hook getInstrLatency handle missing itineraries. 1088 return getInstrLatency(ItinData, DefMI); 1130 unsigned InstrLatency = getInstrLatency(ItinData, DefMI);
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H A D | TwoAddressInstructionPass.cpp | 865 if (TII->getInstrLatency(InstrItins, MI) > 1) 997 if (TII->getInstrLatency(InstrItins, &DefMI) > (Dist - DefDist))
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/external/llvm/lib/Target/AMDGPU/ |
H A D | R600InstrInfo.h | 204 unsigned int getInstrLatency(const InstrItineraryData *ItinData, 208 int getInstrLatency(const InstrItineraryData *ItinData,
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H A D | R600InstrInfo.cpp | 1042 unsigned int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData, function in class:R600InstrInfo
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/external/llvm/lib/Target/X86/ |
H A D | X86PadShortFunction.cpp | 194 CyclesToEnd += TII->getInstrLatency(STI->getInstrItineraryData(), MI);
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H A D | X86FixupLEAs.cpp | 229 InstrDistance += TII->getInstrLatency(
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.h | 332 unsigned getInstrLatency(const InstrItineraryData *ItinData, 336 int getInstrLatency(const InstrItineraryData *ItinData,
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H A D | ARMBaseInstrInfo.cpp | 3647 // No operand latency. The caller may fall back to getInstrLatency. 3690 unsigned Latency = getInstrLatency(ItinData, DefMI); 3716 // Unable to find operand latency. The caller may resort to getInstrLatency. 3967 unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, function in class:ARMBaseInstrInfo 3982 Latency += getInstrLatency(ItinData, &*I, PredCost); 4017 int ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, function in class:ARMBaseInstrInfo
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.h | 115 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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H A D | PPCInstrInfo.cpp | 110 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, function in class:PPCInstrInfo 114 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost); 116 // The default implementation of getInstrLatency calls getStageLatency, but 166 Latency = getInstrLatency(ItinData, DefMI);
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/external/llvm/include/llvm/Target/ |
H A D | TargetInstrInfo.h | 1179 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData, 1185 virtual int getInstrLatency(const InstrItineraryData *ItinData,
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.h | 237 unsigned getInstrLatency(const InstrItineraryData *ItinData,
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H A D | HexagonInstrInfo.cpp | 1374 unsigned HexagonInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, function in class:HexagonInstrInfo 3535 return getInstrLatency(ItinData, MI);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGSDNodes.cpp | 622 SU->Latency += TII->getInstrLatency(InstrItins, N);
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