| /external/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterInfo.cpp | 47 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3, AMDGPU::sub4,
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| H A D | SIMachineFunctionInfo.cpp | 115 getNextUserSGPR(), AMDGPU::sub0, &AMDGPU::SReg_128RegClass);
122 getNextUserSGPR(), AMDGPU::sub0, &AMDGPU::SReg_64RegClass);
129 getNextUserSGPR(), AMDGPU::sub0, &AMDGPU::SReg_64RegClass);
136 getNextUserSGPR(), AMDGPU::sub0, &AMDGPU::SReg_64RegClass);
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| H A D | SIInstrInfo.cpp | 323 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,
337 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,
347 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3,
355 AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2,
359 AMDGPU::sub0, AMDGPU::sub1,
803 unsigned DstLo = RI.getSubReg(Dst, AMDGPU::sub0);
820 .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub0))
832 unsigned DstLo = RI.getSubReg(Dst, AMDGPU::sub0);
839 .addReg(RI.getSubReg(Src0, AMDGPU::sub0))
840 .addReg(RI.getSubReg(Src1, AMDGPU::sub0))
[all...] |
| H A D | SIFrameLowering.cpp | 190 unsigned Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);
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| H A D | SIFoldOperands.cpp | 234 if (UseOp.getSubReg() == AMDGPU::sub0) {
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| H A D | AMDGPUISelDAGToDAG.cpp | 418 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
451 SDValue(Lo, 0), CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32),
715 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
1243 CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32));
1257 CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32),
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| H A D | R600MachineScheduler.cpp | 262 case AMDGPU::sub0:
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| H A D | SILoadStoreOptimizer.cpp | 258 unsigned SubRegIdx0 = (EltSize == 4) ? AMDGPU::sub0 : AMDGPU::sub0_sub1;
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| H A D | SIISelLowering.cpp | 720 Reg = TRI->getMatchingSuperReg(Reg, AMDGPU::sub0,
2193 case AMDGPU::sub0: return 0;
2262 for (unsigned i = 0, Idx = AMDGPU::sub0; i < 4; ++i) {
2273 case AMDGPU::sub0: Idx = AMDGPU::sub1; break;
2391 DAG.getTargetConstant(AMDGPU::sub0, DL, MVT::i32),
2420 SDValue PtrLo = DAG.getTargetExtractSubreg(AMDGPU::sub0, DL, MVT::i32, Ptr);
2435 DAG.getTargetConstant(AMDGPU::sub0, DL, MVT::i32),
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| H A D | SILowerControlFlow.cpp | 409 unsigned SubReg = TRI->getSubReg(VecReg, AMDGPU::sub0);
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| H A D | SIRegisterInfo.cpp | 41 return getMatchingSuperReg(BaseReg, AMDGPU::sub0, &AMDGPU::SReg_128RegClass);
494 // vreg2 = REG_SEQUENCE vreg0, sub0, vreg1, sub1, vreg2, sub2
495 // vreg3 = COPY vreg2, sub0
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| /external/lzma/CPP/7zip/Common/ |
| H A D | FilterCoder.h | 10 #define MY_QUERYINTERFACE_ENTRY_AG(i, sub0, sub) else if (iid == IID_ ## i) \
11 { if (!sub) RINOK(sub0->QueryInterface(IID_ ## i, (void **)&sub)) \
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| /external/icu/android_icu4j/src/main/java/android/icu/util/ |
| H A D | LocaleData.java | 414 String sub0 = "{0}";
418 int index0 = localeSeparator.indexOf(sub0);
421 return localeSeparator.substring(index0 + sub0.length(), index1);
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| /external/icu/icu4j/main/classes/core/src/com/ibm/icu/util/ |
| H A D | LocaleData.java | 442 String sub0 = "{0}";
446 int index0 = localeSeparator.indexOf(sub0);
449 return localeSeparator.substring(index0 + sub0.length(), index1);
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| /external/icu/icu4c/source/i18n/ |
| H A D | ulocdata.c | 335 static const UChar sub0[4] = { 0x007b, 0x0030, 0x007d , 0x0000 }; /* {0} */ local
373 p0=u_strstr(separator, sub0);
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | SIGenRegisterInfo.pl | 33 def sub0 : SubRegIndex;
59 let SubRegIndices = [sub0, sub1, sub2, sub3, sub4, sub5, sub6, sub7];
181 my @subregs_256 = ('sub0', 'sub1', 'sub2', 'sub3', 'sub4', 'sub5', 'sub6', 'sub7');
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| /external/icu/icu4c/source/common/ |
| H A D | locdispnames.cpp | 469 static const UChar sub0[4] = { 0x007b, 0x0030, 0x007d , 0x0000 } ; /* {0} */ local
536 UChar *p0=u_strstr(separator, sub0);
553 UChar *p0=u_strstr(pattern, sub0);
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| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| H A D | postproc_msa.c | 589 v4i32 sub0, sub1, sub2, sub3; local
620 UNPCK_SH_SW(sub_r, sub0, sub1);
624 MUL4(sum0_w, sub0, sum1_w, sub1, sum2_w, sub2, sum3_w, sub3,
694 v4i32 sub0, sub1, sub2, sub3, total0, total1, total2, total3; local
755 UNPCK_SH_SW(sub_r, sub0, sub1);
764 mul0 += add0 * sub0;
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