/art/test/MyClassNatives/ |
H A D | MyClassNatives.java | 33 static native void arraycopy(Object src, int src_pos, Object dst, int dst_pos, int length); argument
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/art/compiler/debug/ |
H A D | elf_gnu_debugdata_writer.h | 34 static void XzCompress(const std::vector<uint8_t>* src, std::vector<uint8_t>* dst) { argument 73 callbacks.dst_ = dst;
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/art/compiler/ |
H A D | image_writer.cc | 1861 void ImageWriter::FixupPointerArray(mirror::Object* dst, mirror::PointerArray* arr, argument 1867 dst->SetClass(GetImageAddress(arr->GetClass())); 1868 auto* dest_array = down_cast<mirror::PointerArray*>(dst); 1903 auto* dst = reinterpret_cast<Object*>(image_info.image_->Begin() + offset); local 1907 image_info.image_bitmap_->Set(dst); // Mark the obj as live. 1911 memcpy(dst, src, n); 1916 dst->SetLockWord(it != saved_hashcode_map_.end() ? 1918 FixupObject(obj, dst);
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H A D | image_writer.h | 351 uint8_t* dst = image_info.image_->Begin() + offset; local 352 return reinterpret_cast<mirror::Object*>(dst); 420 void FixupPointerArray(mirror::Object* dst,
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/art/compiler/jni/ |
H A D | jni_compiler_test.cc | 844 void my_arraycopy(JNIEnv* env, jclass klass, jobject src, jint src_pos, jobject dst, jint dst_pos, jint length) { argument 846 EXPECT_TRUE(env->IsSameObject(JniCompilerTest::jklass_, dst));
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/art/compiler/optimizing/ |
H A D | code_generator.h | 201 virtual void MoveLocation(Location dst, Location src, Primitive::Type dst_type) = 0;
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H A D | code_generator_arm.cc | 1172 void CodeGeneratorARM::MoveLocation(Location dst, Location src, Primitive::Type dst_type) { argument 1174 move.AddMove(src, dst, dst_type, nullptr);
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H A D | code_generator_arm.h | 309 void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE;
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H A D | code_generator_arm64.cc | 1215 CPURegister dst = CPURegisterFrom(destination, dst_type); local 1217 DCHECK(dst.Is64Bits() == source.IsDoubleStackSlot()); 1218 __ Ldr(dst, StackOperandFrom(source)); 1221 MoveConstant(dst, source.GetConstant()); 1224 __ Mov(Register(dst), RegisterFrom(source, dst_type)); 1241 __ Fmov(FPRegister(dst), FPRegisterFrom(source, dst_type)); 1288 CPURegister dst, 1292 __ Ldrb(Register(dst), src); 1295 __ Ldrsb(Register(dst), src); 1298 __ Ldrsh(Register(dst), sr 1287 Load(Primitive::Type type, CPURegister dst, const MemOperand& src) argument 1316 LoadAcquire(HInstruction* instruction, CPURegister dst, const MemOperand& src, bool needs_null_check) argument 1386 Store(Primitive::Type type, CPURegister src, const MemOperand& dst) argument 1392 __ Strb(Register(src), dst); local 1396 __ Strh(Register(src), dst); local 1411 StoreRelease(Primitive::Type type, CPURegister src, const MemOperand& dst) argument 1728 Register dst = OutputRegister(instr); local 1758 FPRegister dst = OutputFPRegister(instr); local 1800 Register dst = OutputRegister(instr); local 1857 Register dst = OutputRegister(instr); local [all...] |
H A D | code_generator_arm64.h | 430 void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE; 433 void Load(Primitive::Type type, vixl::CPURegister dst, const vixl::MemOperand& src); 434 void Store(Primitive::Type type, vixl::CPURegister src, const vixl::MemOperand& dst); 436 vixl::CPURegister dst, 439 void StoreRelease(Primitive::Type type, vixl::CPURegister src, const vixl::MemOperand& dst);
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H A D | code_generator_mips.cc | 807 void CodeGeneratorMIPS::MoveLocation(Location dst, Location src, Primitive::Type dst_type) { argument 808 if (src.Equals(dst)) { 813 MoveConstant(dst, src.GetConstant()); 816 Move64(dst, src); 818 Move32(dst, src); 883 FRegister dst = destination.AsFpuRegister<FRegister>(); local 886 __ Mtc1(src_low, dst); 887 __ MoveToFpuHigh(src_high, dst); 916 Register dst = destination.AsRegister<Register>(); local 917 __ LoadConst32(dst, valu 962 Register dst = destination.AsRegister<Register>(); local 1190 Register dst = locations->Out().AsRegister<Register>(); local 1376 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 1441 Register dst = locations->Out().AsRegister<Register>(); local 2224 Register dst = locations->Out().AsRegister<Register>(); local 2482 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 2620 Register dst = locations->Out().AsRegister<Register>(); local 3475 Register dst; local 3496 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4133 Register dst = locations->Out().AsRegister<Register>(); local 4183 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4225 Register dst = locations->Out().AsRegister<Register>(); local 4243 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4329 Register dst = locations->Out().AsRegister<Register>(); local 4771 Register dst = locations->Out().AsRegister<Register>(); local 4811 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4837 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local 4934 Register dst = locations->Out().AsRegister<Register>(); local 5009 FRegister dst = locations->Out().AsFpuRegister<FRegister>(); local [all...] |
H A D | code_generator_mips.h | 322 void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE;
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H A D | code_generator_mips64.cc | 1066 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 1081 __ Andi(dst, lhs, rhs_imm); 1083 __ And(dst, lhs, rhs_reg); 1086 __ Ori(dst, lhs, rhs_imm); 1088 __ Or(dst, lhs, rhs_reg); 1091 __ Xori(dst, lhs, rhs_imm); 1093 __ Xor(dst, lhs, rhs_reg); 1097 __ Addiu(dst, lhs, rhs_imm); 1099 __ Addu(dst, lhs, rhs_reg); 1102 __ Daddiu(dst, lh 1124 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 1173 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 1810 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 2125 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 2244 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 2760 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 2764 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3351 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3362 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3404 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3414 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3494 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3869 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 3910 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local 3929 GpuRegister dst = locations->Out().AsRegister<GpuRegister>(); local 4013 FpuRegister dst = locations->Out().AsFpuRegister<FpuRegister>(); local [all...] |
H A D | code_generator_mips64.h | 314 void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE;
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H A D | code_generator_x86.cc | 1103 void CodeGeneratorX86::MoveLocation(Location dst, Location src, Primitive::Type dst_type) { argument 1106 move.AddMove(src.ToLow(), dst.ToLow(), Primitive::kPrimInt, nullptr); 1107 move.AddMove(src.ToHigh(), dst.ToHigh(), Primitive::kPrimInt, nullptr); 1109 move.AddMove(src, dst, dst_type, nullptr); 5617 void ParallelMoveResolverX86::MoveMemoryToMemory32(int dst, int src) { argument 5623 __ movl(Address(ESP, dst + stack_offset), temp_reg); 5626 void ParallelMoveResolverX86::MoveMemoryToMemory64(int dst, int src) { argument 5632 __ movl(Address(ESP, dst + stack_offset), temp_reg); 5634 __ movl(Address(ESP, dst + stack_offset + kX86WordSize), temp_reg);
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H A D | code_generator_x86.h | 141 void MoveMemoryToMemory32(int dst, int src); 142 void MoveMemoryToMemory64(int dst, int src); 320 void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE;
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H A D | code_generator_x86_64.cc | 1214 Location dst, Location src, Primitive::Type dst_type ATTRIBUTE_UNUSED) { 1215 Move(dst, src); 1213 MoveLocation( Location dst, Location src, Primitive::Type dst_type ATTRIBUTE_UNUSED) argument
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H A D | code_generator_x86_64.h | 302 void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE;
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H A D | intrinsics_arm64.cc | 379 Register dst = RegisterFrom(instr->GetLocations()->Out(), type); local 385 __ Fmov(dst, fpr); 1674 // void getCharsNoCheck(int srcBegin, int srcEnd, char[] dst, int dstBegin); 1694 // dst to be copied. 1752 // arraycopy(char[] src, int src_pos, char[] dst, int dst_pos, int length). 1815 const Register& dst, 1837 __ Add(dst_base, dst, element_size * constant + data_offset); 1839 __ Add(dst_base, dst, data_offset); 1856 Register dst = XRegisterFrom(locations->InAt(2)); local 1865 __ Cmp(src, dst); 1811 GenSystemArrayCopyAddresses(vixl::MacroAssembler* masm, Primitive::Type type, const Register& src, const Location& src_pos, const Register& dst, const Location& dst_pos, const Location& copy_length, const Register& src_base, const Register& dst_base, const Register& src_end) argument [all...] |
H A D | intrinsics_x86.cc | 1605 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin); 1632 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin); 1638 Register dst = locations->InAt(3).AsRegister<Register>(); local 1646 __ leal(EDI, Address(dst, dstBegin, ScaleFactor::TIMES_2, data_offset));
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H A D | intrinsics_x86_64.cc | 1709 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin); 1735 // public void getChars(int srcBegin, int srcEnd, char[] dst, int dstBegin); 1741 CpuRegister dst = locations->InAt(3).AsRegister<CpuRegister>(); local 1749 __ leaq(CpuRegister(RDI), Address(dst, dstBegin, ScaleFactor::TIMES_2, data_offset));
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/art/compiler/utils/arm/ |
H A D | assembler_arm.cc | 539 ArmManagedRegister dst = mdest.AsArm(); 540 CHECK(dst.IsCoreRegister() && dst.IsCoreRegister()) << dst; 541 LoadFromOffset(kLoadWord, dst.AsCoreRegister(), 544 MaybeUnpoisonHeapReference(dst.AsCoreRegister()); 549 ArmManagedRegister dst = mdest.AsArm(); 550 CHECK(dst.IsCoreRegister()) << dst; 551 LoadFromOffset(kLoadWord, dst [all...] |
H A D | assembler_arm.h | 1003 // src holds a handle scope entry (Object**) load this into dst 1004 void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE;
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/art/compiler/utils/arm64/ |
H A D | assembler_arm64.cc | 293 Arm64ManagedRegister dst = m_dst.AsArm64(); local 294 CHECK(dst.IsXRegister()) << dst; 295 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), SP, offs.Int32Value()); 300 Arm64ManagedRegister dst = m_dst.AsArm64(); local 302 CHECK(dst.IsXRegister() && base.IsXRegister()); 303 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), base.AsXRegister(), 306 WRegister ref_reg = dst.AsOverlappingWRegister(); 312 Arm64ManagedRegister dst = m_dst.AsArm64(); local 314 CHECK(dst 322 Arm64ManagedRegister dst = m_dst.AsArm64(); local 329 Arm64ManagedRegister dst = m_dst.AsArm64(); local [all...] |
H A D | assembler_arm64.h | 187 // src holds a handle scope entry (Object**) load this into dst. 188 void LoadReferenceFromHandleScope(ManagedRegister dst, ManagedRegister src) OVERRIDE; 264 void Load(Arm64ManagedRegister dst, XRegister src, int32_t src_offset, size_t size);
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