/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 558 case 'a': // Address register 602 case 'a': // Address register 680 case 'a': // Address register 958 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, local 961 Address, MachinePointerInfo(), 1094 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, SpillSlot, local 1097 Chain, DL, PartValue, Address, 1118 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, local 1122 MemOpChains.push_back(DAG.getStore(Chain, DL, ArgValue, Address,
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 389 /// \brief Address-mode matching performs shift-of-and to and-of-shift 712 SDValue Address = N->getOperand(1); local 720 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Address)) 730 // Address space 258 is not handled here, because it is not used to
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/external/llvm/lib/Transforms/Utils/ |
H A D | Local.cpp | 260 Value *Address = IBI->getAddress(); local 263 RecursivelyDeleteTriviallyDeadInstructions(Address, TLI); 1226 bool llvm::replaceDbgDeclare(Value *Address, Value *NewAddress, argument 1229 DbgDeclareInst *DDI = FindAllocaDbgDeclare(Address);
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/external/mesa3d/src/glx/ |
H A D | glxcmds.c | 2471 GLvoid *Address; member in struct:name_address_pair 2620 return GLX_functions[i].Address;
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/external/mesa3d/src/mesa/drivers/x11/ |
H A D | glxapi.c | 1225 __GLXextFuncPtr Address; member in struct:name_address_pair 1387 return GLX_functions[i].Address;
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/external/swiftshader/third_party/LLVM/include/llvm/Object/ |
H A D | MachOFormat.h | 238 uint32_t Address; member in struct:llvm::object::macho::Section 251 uint64_t Address; member in struct:llvm::object::macho::Section64
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/external/swiftshader/third_party/LLVM/lib/Bitcode/Reader/ |
H A D | BitcodeReader.cpp | 2445 Value *Address = getFnValueByID(Record[1], OpTy); local 2446 if (OpTy == 0 || Address == 0) 2449 IndirectBrInst *IBI = IndirectBrInst::Create(Address, NumDests);
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/external/swiftshader/third_party/LLVM/lib/MC/ |
H A D | ELFObjectWriter.cpp | 727 uint64_t Flags, uint64_t Address, 735 WriteWord(Address); // sh_addr 726 WriteSecHdrEntry(uint32_t Name, uint32_t Type, uint64_t Flags, uint64_t Address, uint64_t Offset, uint64_t Size, uint32_t Link, uint32_t Info, uint64_t Alignment, uint64_t EntrySize) argument
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 62 typedef struct Address { struct in namespace:__anon18705 76 Address() function in struct:__anon18705::Address 80 } Address; typedef in namespace:__anon18705 176 bool ARMEmitLoad(EVT VT, unsigned &ResultReg, Address &Addr); 177 bool ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr); 178 bool ARMComputeAddress(const Value *Obj, Address &Addr); 179 void ARMSimplifyAddress(Address &Addr, EVT VT); 209 void AddLoadStoreOperands(EVT VT, Address &Addr, 709 bool ARMFastISel::ARMComputeAddress(const Value *Obj, Address &Addr) { 752 Address SavedAdd [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 107 uint64_t Address, const void *Decoder); 109 unsigned RegNo, uint64_t Address, 112 uint64_t Address, const void *Decoder); 114 uint64_t Address, const void *Decoder); 116 uint64_t Address, const void *Decoder); 118 uint64_t Address, const void *Decoder); 120 uint64_t Address, const void *Decoder); 122 uint64_t Address, const void *Decoder); 125 uint64_t Address, 128 uint64_t Address, cons 338 getInstruction(MCInst &MI, uint64_t &Size, const MemoryObject &Region, uint64_t Address, raw_ostream &os, raw_ostream &cs) const argument 433 tryAddingSymbolicOperand(uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const void *Decoder) argument 545 tryAddingPcLoadReferenceComment(uint64_t Address, int Value, const void *Decoder) argument 688 getInstruction(MCInst &MI, uint64_t &Size, const MemoryObject &Region, uint64_t Address, raw_ostream &os, raw_ostream &cs) const argument 851 DecodeGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 862 DecodeGPRnopcRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 868 DecodetGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 875 DecodetcGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 905 DecoderGPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 922 DecodeSPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 943 DecodeDPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 953 DecodeDPR_8RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 961 DecodeDPR_VFP2RegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 976 DecodeQPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 987 DecodePredicateOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1001 DecodeCCOutOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1010 DecodeSOImmOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1019 DecodeSORegImmOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1056 DecodeSORegRegOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1091 DecodeRegListOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1126 DecodeSPRRegListOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1143 DecodeDPRRegListOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1160 DecodeBitfieldMaskOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1181 DecodeCopMemInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1336 DecodeAddrMode2IdxInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1439 DecodeSORegMemOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1480 DecodeAddrMode3Instruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1591 DecodeRFEInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1620 DecodeMemMultipleWritebackInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1705 DecodeCPSInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1745 DecodeT2CPSInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1785 DecodeT2MOVTWInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1809 DecodeArmMOVTWInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1835 DecodeSMLAInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1863 DecodeAddrModeImm12Operand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1883 DecodeAddrMode5Operand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1902 DecodeAddrMode7Operand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1908 DecodeBranchImmInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1932 DecodeVCVTImmOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1938 DecodeAddrMode6Operand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1955 DecodeVLDInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2204 DecodeVSTInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2454 DecodeVLD1DupInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2493 DecodeVLD2DupInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2529 DecodeVLD3DupInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2564 DecodeVLD4DupInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2617 DecodeNEONModImmInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2662 DecodeVSHLMaxInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2681 DecodeShiftRight8Imm(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2687 DecodeShiftRight16Imm(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2693 DecodeShiftRight32Imm(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2699 DecodeShiftRight64Imm(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2705 DecodeTBLInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2736 DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 2760 DecodeThumbBROperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2766 DecodeT2BROperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2772 DecodeThumbCmpBROperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2778 DecodeThumbAddrModeRR(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2793 DecodeThumbAddrModeIS(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2807 DecodeThumbAddrModePC(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2817 DecodeThumbAddrModeSP(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2825 DecodeT2AddrModeSOReg(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2842 DecodeT2LoadShift(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2897 DecodeT2Imm8S4(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2906 DecodeT2AddrModeImm8s4(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2921 DecodeT2AddrModeImm0_1020s4(llvm::MCInst &Inst,unsigned Val, uint64_t Address, const void *Decoder) argument 2936 DecodeT2Imm8(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2949 DecodeT2AddrModeImm8(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2980 DecodeT2LdStPre(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3010 DecodeT2AddrModeImm12(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3025 DecodeThumbAddSPImm(llvm::MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3036 DecodeThumbAddSPReg(llvm::MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3061 DecodeThumbCPS(llvm::MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3072 DecodePostIdxReg(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3085 DecodeThumbBLXOffset(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3094 DecodeCoprocessor(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3104 DecodeThumbTableBranch(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3120 DecodeThumb2BCCInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3162 DecodeT2SOImm(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3194 DecodeThumbBCCTargetOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3200 DecodeThumbBLTargetOperand(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3206 DecodeMemBarrierOption(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3226 DecodeMSRMask(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3233 DecodeDoubleRegLoad(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3256 DecodeDoubleRegStore(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3283 DecodeLDRPreImm(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3308 DecodeLDRPreReg(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3336 DecodeSTRPreImm(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3361 DecodeSTRPreReg(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3386 DecodeVLD1LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3445 DecodeVST1LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3503 DecodeVLD2LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3570 DecodeVST2LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3634 DecodeVLD3LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3704 DecodeVST3LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3768 DecodeVLD4LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3842 DecodeVST4LN(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3907 DecodeVMOVSRR(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3933 DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3959 DecodeIT(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3986 DecodeT2LDRDPreInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4023 DecodeT2STRDPreInstruction(llvm::MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4057 DecodeT2Adr(llvm::MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument 4072 DecodeT2ShifterImmOperand(llvm::MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 586 SDValue Address = N->getOperand(1); local 594 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Address))
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/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
H A D | GVN.cpp | 1313 Value *Address = Deps[i].getAddress(); local 1319 if (TD && Address) { 1320 int Offset = AnalyzeLoadFromClobberingStore(LI->getType(), Address, 1338 if (DepLI != LI && Address && TD) { 1354 if (TD && Address) { 1355 int Offset = AnalyzeLoadFromClobberingMemInst(LI->getType(), Address, 1572 PHITransAddr Address(LI->getPointerOperand(), TD); 1575 LoadPtr = Address.PHITranslateWithInsertion(LoadBB, UnavailablePred, 1578 Address.PHITranslateValue(LoadBB, UnavailablePred, DT); 1579 LoadPtr = Address [all...] |
/external/syslinux/efi32/include/efi/ |
H A D | efiip.h | 225 EFI_IPv6_ADDRESS Address; member in struct:__anon19519
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/external/syslinux/efi64/include/efi/ |
H A D | efiip.h | 225 EFI_IPv6_ADDRESS Address; member in struct:__anon19699
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/external/syslinux/gnu-efi/gnu-efi-3.0/inc/ |
H A D | efiip.h | 225 EFI_IPv6_ADDRESS Address; member in struct:__anon19902
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 53 typedef struct Address { struct in namespace:__anon12899 67 Address() function in struct:__anon12899::Address 71 } Address; typedef in namespace:__anon12899 165 bool ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, 168 bool ARMEmitStore(MVT VT, unsigned SrcReg, Address &Addr, 170 bool ARMComputeAddress(const Value *Obj, Address &Addr); 171 void ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3); 173 bool ARMTryEmitSmallMemCpy(Address Dest, Address Src, uint64_t Len, 210 void AddLoadStoreOperands(MVT VT, Address [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 97 ArrayRef<uint8_t> Bytes, uint64_t Address, 112 ArrayRef<uint8_t> Bytes, uint64_t Address, 142 uint64_t Address, const void *Decoder); 144 unsigned RegNo, uint64_t Address, 147 unsigned RegNo, uint64_t Address, 150 uint64_t Address, const void *Decoder); 152 uint64_t Address, const void *Decoder); 154 uint64_t Address, const void *Decoder); 156 uint64_t Address, const void *Decoder); 158 uint64_t Address, cons 415 checkDecodedInstruction(MCInst &MI, uint64_t &Size, uint64_t Address, raw_ostream &OS, raw_ostream &CS, uint32_t Insn, DecodeStatus Result) argument 436 getInstruction(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, raw_ostream &OS, raw_ostream &CS) const argument 545 tryAddingSymbolicOperand(uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const void *Decoder) argument 563 tryAddingPcLoadReferenceComment(uint64_t Address, int Value, const void *Decoder) argument 698 getInstruction(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, raw_ostream &OS, raw_ostream &CS) const argument 881 DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 892 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 905 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 919 DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 931 DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 946 DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 976 DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1001 DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1022 DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1037 DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1045 DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1060 DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1080 DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1101 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) argument 1113 DecodePredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1127 DecodeCCOutOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1136 DecodeSORegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1173 DecodeSORegRegOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1208 DecodeRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1245 DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1269 DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1294 DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1321 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1471 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1576 DecodeSORegMemOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 1620 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1811 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1840 DecodeQADDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1863 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1955 DecodeHINTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 1977 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2024 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2066 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2090 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2117 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2145 DecodeTSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2166 DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2194 DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2214 DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2234 DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2254 DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2260 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2287 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2313 DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 2330 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2604 DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2617 DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2632 DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2645 DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2655 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2926 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 2973 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3021 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3056 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3109 DecodeNEONModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3154 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3173 DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3179 DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3185 DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3191 DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3197 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3233 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3257 DecodeThumbBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3265 DecodeT2BROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3273 DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3281 DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3296 DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3310 DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3320 DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3328 DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3356 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3438 DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3522 DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3602 DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3641 DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) argument 3694 DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3708 DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3723 DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, uint64_t Address, const void *Decoder) argument 3738 DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3751 DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3797 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3858 DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3884 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3895 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3920 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) argument 3931 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 3944 DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3968 DecodeCoprocessor(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 3984 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4000 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4042 DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4074 DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4082 DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4105 DecodeMemBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4114 DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4123 DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4204 DecodeBankedReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 4227 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4248 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4273 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4298 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4326 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4351 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4376 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4443 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4509 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4576 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4640 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4710 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4774 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4855 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4927 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4953 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4979 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 4999 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 5036 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 5070 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) argument 5085 DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) argument 5096 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 5123 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 5182 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) argument 5241 DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument 5268 DecoderForMRRC2AndMCRR2(llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) argument [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 2178 SDValue Address = Op->getOperand(2); local 2181 EVT PtrTy = Address->getValueType(0); 2183 Address = DAG.getNode(ISD::ADD, DL, PtrTy, Address, Offset); 2185 return DAG.getLoad(ResTy, DL, ChainIn, Address, MachinePointerInfo(), false, 2247 SDValue Address = Op->getOperand(3); local 2249 EVT PtrTy = Address->getValueType(0); 2251 Address = DAG.getNode(ISD::ADD, DL, PtrTy, Address, Offset); 2253 return DAG.getStore(ChainIn, DL, Value, Address, MachinePointerInf [all...] |
/external/llvm/lib/Transforms/Scalar/ |
H A D | GVN.cpp | 1222 Value *Address, AvailableValue &Res) { 1236 if (Address && LI->isAtomic() <= DepSI->isAtomic()) { 1238 AnalyzeLoadFromClobberingStore(LI->getType(), Address, DepSI); 1254 if (DepLI != LI && Address && LI->isAtomic() <= DepLI->isAtomic()) { 1256 AnalyzeLoadFromClobberingLoad(LI->getType(), Address, DepLI, DL); 1268 if (Address && !LI->isAtomic()) { 1269 int Offset = AnalyzeLoadFromClobberingMemInst(LI->getType(), Address, 1376 Value *Address = Deps[i].getAddress(); local 1379 if (AnalyzeLoadAvailability(LI, DepInfo, Address, AV)) { 1510 PHITransAddr Address(L 1221 AnalyzeLoadAvailability(LoadInst *LI, MemDepResult DepInfo, Value *Address, AvailableValue &Res) argument [all...] |
/external/swiftshader/third_party/LLVM/lib/VMCore/ |
H A D | Instructions.cpp | 3215 void IndirectBrInst::init(Value *Address, unsigned NumDests) { argument 3216 assert(Address && Address->getType()->isPointerTy() && 3217 "Address of indirectbr must be a pointer"); 3222 OperandList[0] = Address; 3242 IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases, argument 3244 : TerminatorInst(Type::getVoidTy(Address->getContext()),Instruction::IndirectBr, 3246 init(Address, NumCases); 3249 IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases, argument 3251 : TerminatorInst(Type::getVoidTy(Address [all...] |
/external/clang/lib/CodeGen/ |
H A D | CGStmtOpenMP.cpp | 73 InlinedShareds.addPrivate(VD, [&CGF, &DRE]() -> Address { 172 static Address castValueFromUintptr(CodeGenFunction &CGF, QualType DstType, 288 Address ArgAddr = ArgLVal.getAddress(); 294 Var, Address(ArgAddr.getPointer(), getContext().getDeclAlign(Var))); 324 Address DestAddr, Address SrcAddr, QualType OriginalType, 325 const llvm::function_ref<void(Address, Address)> &CopyGen) { 354 Address SrcElementCurrent = 355 Address(SrcElementPH 451 EmitOMPAggregateInit(CodeGenFunction &CGF, Address DestAddr, QualType Type, const Expr *Init, Address SrcAddr = Address::invalid()) argument [all...] |
/external/llvm/lib/Bitcode/Reader/ |
H A D | BitcodeReader.cpp | 5066 Value *Address = getValue(Record, 1, NextValueNo, OpTy); local 5067 if (!OpTy || !Address) 5070 IndirectBrInst *IBI = IndirectBrInst::Create(Address, NumDests);
|
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 45 class Address { class in class:__anon12813::final 65 Address() : Kind(RegBase), ExtType(AArch64_AM::InvalidShiftExtend), function in class:__anon12813::final::Address 142 bool computeAddress(const Value *Obj, Address &Addr, Type *Ty = nullptr); 143 bool computeCallAddress(const Value *V, Address &Addr); 144 bool simplifyAddress(Address &Addr, MVT VT); 145 void addLoadStoreOperands(Address &Addr, const MachineInstrBuilder &MIB, 149 bool tryEmitSmallMemCpy(Address Dest, Address Src, uint64_t Len, 184 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true, 186 bool emitStore(MVT VT, unsigned SrcReg, Address Add [all...] |
/external/llvm/tools/dsymutil/ |
H A D | DwarfLinker.cpp | 189 int64_t AddrAdjust; ///< Address offset to apply to the described entity. 569 void emitFDE(uint32_t CIEOffset, uint32_t AddreSize, uint32_t Address, 671 /// uint8_t Address size 792 Asm->EmitInt8(AddressSize); // Address size 920 uint64_t Address = -1ULL; local 928 if (Address == -1ULL) { 932 MS->EmitIntValue(Row.Address, PointerSize); 936 AddressDelta = (Row.Address - Address) / MinInstLength; 993 Address 1089 emitFDE(uint32_t CIEOffset, uint32_t AddrSize, uint32_t Address, StringRef FDEBytes) argument [all...] |
/external/llvm/tools/llvm-readobj/ |
H A D | ELFDumper.cpp | 80 /// \brief Address in current address space. 504 W.printHex("Address", Sec->sh_addr); 2106 W.printHex("Address", GotAddr + Offset); 2137 W.printHex("Address", PLTAddr + Offset); 2149 W.printHex("Address", PLTAddr + Offset); 2635 std::string Number, Type, Size, Address, Offset, Flags, Link, Info, EntrySize, local 2654 {"Address", 41}, 2672 Address = to_string(format_hex_no_prefix(Sec.sh_addr, Width)); 2673 Fields[3].Str = Address; 3360 W.printHex("Address", Se [all...] |