Searched defs:NewReg (Results 1 - 25 of 36) sorted by relevance

12

/external/llvm/lib/CodeGen/
H A DAntiDepBreaker.h57 /// other machine instruction to use NewReg.
58 void UpdateDbgValue(MachineInstr &MI, unsigned OldReg, unsigned NewReg) { argument
61 MI.getOperand(0).setReg(NewReg);
H A DCriticalAntiDepBreaker.cpp320 // be replaced by NewReg. Return true if any of their parent instructions may
325 // the two-address instruction also defines NewReg, as may happen with
329 // both NewReg and AntiDepReg covers it.
333 unsigned NewReg)
339 // operands, in case they may be assigned to NewReg. In this case antidep
344 // Handle cases in which this instruction defines NewReg.
349 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg))
353 CheckOper.getReg() != NewReg)
356 // Don't allow the instruction to define NewReg and AntiDepReg.
362 // NewReg
331 isNewRegClobberedByRefs(RegRefIter RegRefBegin, RegRefIter RegRefEnd, unsigned NewReg) argument
385 unsigned NewReg = Order[i]; local
[all...]
H A DMachineCSE.cpp540 unsigned NewReg = CSMI->getOperand(i).getReg(); local
549 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg)
552 if (OldReg == NewReg) {
558 TargetRegisterInfo::isVirtualRegister(NewReg) &&
561 if (!isProfitableToCSE(NewReg, OldReg, CSMI, MI)) {
570 if (!MRI->constrainRegClass(NewReg, OldRC)) {
576 CSEPairs.push_back(std::make_pair(OldReg, NewReg));
584 unsigned NewReg = CSEPair.second; local
586 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg);
588 Def->clearRegisterDeads(NewReg);
[all...]
H A DTailDuplicator.cpp287 void TailDuplicator::addSSAUpdateEntry(unsigned OrigReg, unsigned NewReg, argument
292 LI->second.push_back(std::make_pair(BB, NewReg));
295 Vals.push_back(std::make_pair(BB, NewReg));
351 unsigned NewReg = MRI->createVirtualRegister(RC); local
352 MO.setReg(NewReg);
353 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0)));
355 addSSAUpdateEntry(Reg, NewReg, PredBB);
395 unsigned NewReg = MRI->createVirtualRegister(NewRC); local
397 TII->get(TargetOpcode::COPY), NewReg)
400 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg,
[all...]
H A DPeepholeOptimizer.cpp800 /// \brief Rewrite the current source with \p NewReg and \p NewSubReg
803 virtual bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) { argument
807 MOSrc.setReg(NewReg);
1004 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
1009 MO.setReg(NewReg);
1053 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
1058 CopyLike.getOperand(CurrentSrcIdx).setReg(NewReg); variable
1132 bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
1139 MO.setReg(NewReg);
/external/swiftshader/third_party/LLVM/lib/CodeGen/
H A DAntiDepBreaker.h61 /// other machine instruction to use NewReg.
62 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) { argument
65 MI->getOperand(0).setReg(NewReg);
H A DCriticalAntiDepBreaker.cpp329 // be replaced by NewReg. Return true if any of their parent instructions may
334 // the two-address instruction also defines NewReg, as may happen with
338 // both NewReg and AntiDepReg covers it.
342 unsigned NewReg)
348 // operands, in case they may be assigned to NewReg. In this case antidep
353 // Handle cases in which this instructions defines NewReg.
359 CheckOper.getReg() != NewReg)
362 // Don't allow the instruction to define NewReg and AntiDepReg.
368 // NewReg
372 // Don't allow inline asm to define NewReg a
340 isNewRegClobberedByRefs(RegRefIter RegRefBegin, RegRefIter RegRefEnd, unsigned NewReg) argument
390 unsigned NewReg = Order[i]; local
[all...]
H A DMachineCSE.cpp430 unsigned NewReg = CSMI->getOperand(i).getReg(); local
431 if (OldReg == NewReg)
435 TargetRegisterInfo::isVirtualRegister(NewReg) &&
438 if (!isProfitableToCSE(NewReg, OldReg, CSMI, MI)) {
446 if (!MRI->constrainRegClass(NewReg, OldRC)) {
451 CSEPairs.push_back(std::make_pair(OldReg, NewReg));
H A DMachineSSAUpdater.cpp235 void MachineSSAUpdater::ReplaceRegWith(unsigned OldReg, unsigned NewReg) { argument
236 MRI->replaceRegWith(OldReg, NewReg);
242 I->second = NewReg;
H A DStackSlotColoring.cpp137 unsigned OldReg, unsigned NewReg);
140 unsigned OldReg, unsigned NewReg);
493 /// OldReg. If it can successfully update all of the references with NewReg,
497 unsigned OldReg, unsigned NewReg) {
525 if (RC && !RC->contains(NewReg))
535 } else if (TRI->regsOverlap(Reg, NewReg)) {
546 Refs[i]->setReg(NewReg);
558 /// it can successfully update all of the uses with NewReg, do so and
562 unsigned OldReg, unsigned NewReg) {
587 if (RC && !RC->contains(NewReg))
495 PropagateBackward(MachineBasicBlock::iterator MII, MachineBasicBlock *MBB, unsigned OldReg, unsigned NewReg) argument
560 PropagateForward(MachineBasicBlock::iterator MII, MachineBasicBlock *MBB, unsigned OldReg, unsigned NewReg) argument
[all...]
H A DStrongPHIElimination.cpp139 // Merges the live interval of Reg into NewReg and renames Reg to NewReg
140 // everywhere that Reg appears. Requires Reg and NewReg to have non-
142 void MergeLIsAndRename(unsigned Reg, unsigned NewReg);
311 unsigned NewReg = RegRenamingMap[SrcColor]; local
312 if (!NewReg) {
313 NewReg = SrcReg;
316 MergeLIsAndRename(SrcReg, NewReg);
320 MergeLIsAndRename(DestReg, NewReg);
324 MergeLIsAndRename(SrcReg, NewReg);
343 unsigned NewReg = RegRenamingMap[DestColor]; local
802 MergeLIsAndRename(unsigned Reg, unsigned NewReg) argument
[all...]
H A DTailDuplication.cpp80 void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
359 void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg, argument
363 LI->second.push_back(std::make_pair(BB, NewReg));
366 Vals.push_back(std::make_pair(BB, NewReg));
424 unsigned NewReg = MRI->createVirtualRegister(RC); local
425 MO.setReg(NewReg);
426 LocalVRMap.insert(std::make_pair(Reg, NewReg));
428 AddSSAUpdateEntry(Reg, NewReg, PredBB);
H A DLiveDebugVariables.cpp250 /// renameRegister - Update locations to rewrite OldReg as NewReg:SubIdx.
251 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx,
337 /// renameRegister - Replace all references to OldReg with NewReg:SubIdx.
338 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx);
701 renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx, argument
708 if (TargetRegisterInfo::isPhysicalRegister(NewReg))
709 Loc.substPhysReg(NewReg, *TRI);
711 Loc.substVirtReg(NewReg, SubIdx, *TRI);
717 renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx) { argument
722 if (TargetRegisterInfo::isVirtualRegister(NewReg))
733 renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx) argument
[all...]
H A DTwoAddressInstructionPass.cpp690 unsigned NewReg = 0; local
693 NewReg, IsDstPhys)) {
703 VirtRegPairs.push_back(NewReg);
706 bool isNew = SrcRegMap.insert(std::make_pair(NewReg, Reg)).second;
708 assert(SrcRegMap[NewReg] == Reg && "Can't map to two src registers!");
709 VirtRegPairs.push_back(NewReg);
710 Reg = NewReg;
/external/llvm/lib/Target/AArch64/
H A DAArch64DeadRegisterDefinitionsPass.cpp121 unsigned NewReg; local
127 NewReg = AArch64::WZR;
130 NewReg = AArch64::XZR;
134 MO.setReg(NewReg);
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyPeephole.cpp57 /// If desirable, rewrite NewReg to a drop register.
58 static bool MaybeRewriteToDrop(unsigned OldReg, unsigned NewReg, argument
62 if (OldReg == NewReg) {
64 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); local
65 MO.setReg(NewReg);
67 MFI.stackifyVReg(NewReg);
91 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); local
92 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg)
94 MO.setReg(NewReg);
95 MFI.stackifyVReg(NewReg);
136 unsigned NewReg = local
157 unsigned NewReg = Op2.getReg(); local
[all...]
H A DWebAssemblyRegStackify.cpp452 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); local
453 Def->getOperand(0).setReg(NewReg);
454 Op.setReg(NewReg);
457 LIS.createAndComputeVirtRegInterval(NewReg);
465 MFI.stackifyVReg(NewReg);
484 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); local
485 TII->reMaterialize(MBB, Insert, NewReg, 0, Def, *TRI);
486 Op.setReg(NewReg);
489 LIS.createAndComputeVirtRegInterval(NewReg);
490 MFI.stackifyVReg(NewReg);
[all...]
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp247 MCOperand NewReg; local
252 NewReg = MCOperand::createReg(MRI.getMatchingSuperReg(
254 NewMI.addOperand(NewReg);
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
H A DMipsFrameLowering.cpp107 // (NewReg, NewImm) = ($at, lo(Ox10000))
110 unsigned& NewReg, int& NewImm,
115 NewReg = OrigReg;
132 NewReg = Mips::AT;
149 unsigned NewReg = 0; local
181 ATUsed = expandRegLargeImmPair(Mips::SP, -StackSize, NewReg, NewImm, MBB,
184 .addReg(NewReg).addImm(NewImm);
279 unsigned NewReg = 0; local
298 ATUsed = expandRegLargeImmPair(Mips::SP, StackSize, NewReg, NewImm, MBB,
301 .addReg(NewReg)
109 expandRegLargeImmPair(unsigned OrigReg, int OrigImm, unsigned& NewReg, int& NewImm, MachineBasicBlock& MBB, MachineBasicBlock::iterator I) argument
[all...]
/external/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp647 unsigned NewReg = optimizeSDPattern(MI); local
649 if (NewReg != 0) {
655 // reference into a plain DPR, and that will end poorly. NewReg is
658 MRI->constrainRegClass(NewReg, MRI->getRegClass((*I)->getReg()));
662 << PrintReg(NewReg) << "\n");
663 (*I)->substVirtReg(NewReg, 0, *TRI);
666 Replacements[MI] = NewReg;
H A DARMBaseRegisterInfo.cpp310 ARMBaseRegisterInfo::updateRegAllocHint(unsigned Reg, unsigned NewReg, argument
325 MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg);
326 if (TargetRegisterInfo::isVirtualRegister(NewReg))
327 MRI->setRegAllocationHint(NewReg,
/external/clang/lib/StaticAnalyzer/Core/
H A DExprEngineCXX.cpp491 const MemRegion *NewReg = symVal.castAs<loc::MemRegionVal>().getRegion(); local
494 getStoreManager().GetElementZeroRegion(NewReg, ObjTy);
/external/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp340 unsigned NewReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); local
353 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_ADD_I32_e64), NewReg)
358 FIOp->ChangeToRegister(NewReg, false);
/external/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1020 unsigned NewReg = ScratchFPReg; local
1021 duplicateToTop(FirstFPRegOp, NewReg, MI);
1022 FirstFPRegOp = NewReg;
/external/swiftshader/third_party/LLVM/include/llvm/Target/
H A DTargetRegisterInfo.h541 virtual void UpdateRegAllocHint(unsigned Reg, unsigned NewReg, argument

Completed in 449 milliseconds

12