Searched refs:PreIndex (Results 1 - 25 of 34) sorted by relevance

12

/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-memop-immediate-8192-a32.cc1600 {{al, r0, r2, minus, 3194, PreIndex},
1603 "al r0 r2 minus 3194 PreIndex",
1610 {{al, r5, r6, plus, 1437, PreIndex},
1613 "al r5 r6 plus 1437 PreIndex",
1625 {{al, r5, r0, plus, 1066, PreIndex},
1628 "al r5 r0 plus 1066 PreIndex",
1630 {{al, r11, r6, minus, 3069, PreIndex},
1633 "al r11 r6 minus 3069 PreIndex",
1635 {{al, r12, r3, plus, 595, PreIndex},
1638 "al r12 r3 plus 595 PreIndex",
[all...]
H A Dtest-assembler-cond-rd-memop-rs-a32.cc1604 {{al, r2, r5, plus, r9, PreIndex},
1607 "al r2 r5 plus r9 PreIndex",
1609 {{al, r8, r14, plus, r9, PreIndex},
1612 "al r8 r14 plus r9 PreIndex",
1614 {{al, r2, r10, minus, r3, PreIndex},
1617 "al r2 r10 minus r3 PreIndex",
1624 {{al, r1, r2, plus, r4, PreIndex},
1627 "al r1 r2 plus r4 PreIndex",
1634 {{al, r1, r8, plus, r6, PreIndex},
1637 "al r1 r8 plus r6 PreIndex",
[all...]
H A Dtest-assembler-cond-rd-memop-immediate-512-a32.cc1610 {{al, r5, r3, minus, 99, PreIndex},
1613 "al r5 r3 minus 99 PreIndex",
1620 {{al, r13, r12, plus, 161, PreIndex},
1623 "al r13 r12 plus 161 PreIndex",
1625 {{al, r4, r13, minus, 132, PreIndex},
1628 "al r4 r13 minus 132 PreIndex",
1635 {{al, r11, r14, minus, 116, PreIndex},
1638 "al r11 r14 minus 116 PreIndex",
1645 {{al, r8, r4, minus, 198, PreIndex},
1648 "al r8 r4 minus 198 PreIndex",
[all...]
H A Dtest-simulator-cond-rd-memop-immediate-512-a32.cc2330 {{al, r14, r9, plus, 41, PreIndex},
2331 "al r14 r9 plus 41 PreIndex",
2335 {{al, r7, r9, plus, 78, PreIndex},
2336 "al r7 r9 plus 78 PreIndex",
2340 {{al, r6, r3, plus, 255, PreIndex},
2341 "al r6 r3 plus 255 PreIndex",
2345 {{al, r11, r8, plus, 139, PreIndex},
2346 "al r11 r8 plus 139 PreIndex",
2350 {{al, r6, r3, plus, 170, PreIndex},
2351 "al r6 r3 plus 170 PreIndex",
[all...]
H A Dtest-simulator-cond-rd-memop-immediate-8192-a32.cc2330 {{al, r14, r12, plus, 2982, PreIndex},
2331 "al r14 r12 plus 2982 PreIndex",
2335 {{al, r7, r11, plus, 1241, PreIndex},
2336 "al r7 r11 plus 1241 PreIndex",
2340 {{al, r6, r5, plus, 2677, PreIndex},
2341 "al r6 r5 plus 2677 PreIndex",
2345 {{al, r11, r12, plus, 2403, PreIndex},
2346 "al r11 r12 plus 2403 PreIndex",
2350 {{al, r6, r5, plus, 1274, PreIndex},
2351 "al r6 r5 plus 1274 PreIndex",
[all...]
H A Dtest-simulator-cond-rd-memop-rs-a32.cc2337 {{al, r12, r9, plus, r0, PreIndex},
2338 "al r12 r9 plus r0 PreIndex",
2342 {{al, r0, r4, plus, r11, PreIndex},
2343 "al r0 r4 plus r11 PreIndex",
2347 {{al, r14, r8, plus, r7, PreIndex},
2348 "al r14 r8 plus r7 PreIndex",
2352 {{al, r2, r1, plus, r8, PreIndex},
2353 "al r2 r1 plus r8 PreIndex",
2357 {{al, r7, r9, plus, r5, PreIndex},
2358 "al r7 r9 plus r5 PreIndex",
[all...]
H A Dtest-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc2335 {{al, r4, r9, plus, r3, LSL, 2, PreIndex},
2336 "al r4 r9 plus r3 LSL 2 PreIndex",
2340 {{al, r1, r9, plus, r10, LSL, 25, PreIndex},
2341 "al r1 r9 plus r10 LSL 25 PreIndex",
2345 {{al, r14, r1, plus, r12, ROR, 24, PreIndex},
2346 "al r14 r1 plus r12 ROR 24 PreIndex",
2350 {{al, r3, r10, plus, r14, LSL, 24, PreIndex},
2351 "al r3 r10 plus r14 LSL 24 PreIndex",
2355 {{al, r10, r5, plus, r0, LSL, 17, PreIndex},
2356 "al r10 r5 plus r0 LSL 17 PreIndex",
[all...]
H A Dtest-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc2335 {{al, r4, r7, plus, r5, LSR, 28, PreIndex},
2336 "al r4 r7 plus r5 LSR 28 PreIndex",
2340 {{al, r1, r9, plus, r0, LSR, 17, PreIndex},
2341 "al r1 r9 plus r0 LSR 17 PreIndex",
2345 {{al, r12, r9, plus, r7, ASR, 17, PreIndex},
2346 "al r12 r9 plus r7 ASR 17 PreIndex",
2350 {{al, r3, r9, plus, r6, LSR, 2, PreIndex},
2351 "al r3 r9 plus r6 LSR 2 PreIndex",
2355 {{al, r10, r0, plus, r11, ASR, 9, PreIndex},
2356 "al r10 r0 plus r11 ASR 9 PreIndex",
[all...]
H A Dtest-assembler-cond-rd-memop-rs-shift-amount-1to32-a32.cc1602 {{al, r8, r0, plus, r1, ASR, 3, PreIndex},
1605 "al r8 r0 plus r1 ASR 3 PreIndex",
1607 {{al, r0, r14, minus, r6, ASR, 27, PreIndex},
1610 "al r0 r14 minus r6 ASR 27 PreIndex",
1622 {{al, r2, r5, plus, r6, ASR, 7, PreIndex},
1625 "al r2 r5 plus r6 ASR 7 PreIndex",
1632 {{al, r0, r11, minus, r1, ASR, 13, PreIndex},
1635 "al r0 r11 minus r1 ASR 13 PreIndex",
1637 {{al, r13, r12, plus, r6, LSR, 16, PreIndex},
1640 "al r13 r12 plus r6 LSR 16 PreIndex",
[all...]
H A Dtest-assembler-cond-rd-memop-rs-shift-amount-1to31-a32.cc1602 {{al, r8, r3, minus, r4, ROR, 30, PreIndex},
1605 "al r8 r3 minus r4 ROR 30 PreIndex",
1607 {{al, r1, r0, plus, r5, LSL, 13, PreIndex},
1610 "al r1 r0 plus r5 LSL 13 PreIndex",
1622 {{al, r2, r6, plus, r7, ROR, 18, PreIndex},
1625 "al r2 r6 plus r7 ROR 18 PreIndex",
1627 {{al, r0, r11, minus, r11, ROR, 26, PreIndex},
1630 "al r0 r11 minus r11 ROR 26 PreIndex",
1632 {{al, r14, r4, plus, r14, LSL, 12, PreIndex},
1635 "al r14 r4 plus r14 LSL 12 PreIndex",
[all...]
H A Dtest-disasm-a32.cc654 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xfff123, PreIndex)),
658 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xff123, PreIndex)),
661 COMPARE_A32(Ldr(r0, MemOperand(r1, -0xff123, PreIndex)),
665 COMPARE_T32(Ldr(r0, MemOperand(r1, 0xfff12, PreIndex)),
669 COMPARE_T32(Ldr(r0, MemOperand(r1, 0xff12, PreIndex)),
672 COMPARE_T32(Ldr(r0, MemOperand(r1, -0xff12, PreIndex)),
722 MUST_FAIL_TEST_BOTH(Ldr(r0, MemOperand(r0, 0xfff12, PreIndex)),
755 COMPARE_T32(Ldr(r0, MemOperand(r1, minus, r2, PreIndex)),
770 COMPARE_A32(Ldr(pc, MemOperand(r0, r0, PreIndex)), "ldr pc, [r0, r0]!\n");
771 COMPARE_T32(Ldr(pc, MemOperand(r0, r0, PreIndex)),
[all...]
/external/vixl/test/aarch64/
H A Dtest-disasm-aarch64.cc1009 COMPARE(ldr(w0, MemOperand(x1, 4, PreIndex)), "ldr w0, [x1, #4]!");
1010 COMPARE(ldr(w2, MemOperand(x3, 255, PreIndex)), "ldr w2, [x3, #255]!");
1011 COMPARE(ldr(w4, MemOperand(x5, -256, PreIndex)), "ldr w4, [x5, #-256]!");
1012 COMPARE(ldr(x6, MemOperand(x7, 8, PreIndex)), "ldr x6, [x7, #8]!");
1013 COMPARE(ldr(x8, MemOperand(x9, 255, PreIndex)), "ldr x8, [x9, #255]!");
1014 COMPARE(ldr(x10, MemOperand(x11, -256, PreIndex)), "ldr x10, [x11, #-256]!");
1015 COMPARE(str(w12, MemOperand(x13, 4, PreIndex)), "str w12, [x13, #4]!");
1016 COMPARE(str(w14, MemOperand(x15, 255, PreIndex)), "str w14, [x15, #255]!");
1017 COMPARE(str(w16, MemOperand(x17, -256, PreIndex)), "str w16, [x17, #-256]!");
1018 COMPARE(str(x18, MemOperand(x19, 8, PreIndex)), "st
[all...]
H A Dtest-trace-aarch64.cc170 __ ldp(w23, w24, MemOperand(x1, 8, PreIndex));
173 __ ldp(x25, x26, MemOperand(x1, 16, PreIndex));
176 __ ldpsw(x27, x28, MemOperand(x1, 8, PreIndex));
179 __ ldr(w29, MemOperand(x1, 4, PreIndex));
182 __ ldr(x2, MemOperand(x1, 8, PreIndex));
185 __ ldrb(w3, MemOperand(x1, 1, PreIndex));
188 __ ldrb(x4, MemOperand(x1, 1, PreIndex));
191 __ ldrh(w5, MemOperand(x1, 2, PreIndex));
194 __ ldrh(x6, MemOperand(x1, 2, PreIndex));
197 __ ldrsb(w7, MemOperand(x1, 1, PreIndex));
[all...]
H A Dtest-assembler-aarch64.cc2416 __ Ldr(w2, MemOperand(x26, 6144 * sizeof(src[0]), PreIndex));
2417 __ Str(w2, MemOperand(x27, 6144 * sizeof(dst[0]), PreIndex));
2458 __ Ldr(w0, MemOperand(x17, 4, PreIndex));
2459 __ Str(w0, MemOperand(x18, 12, PreIndex));
2460 __ Ldr(x1, MemOperand(x19, 8, PreIndex));
2461 __ Str(x1, MemOperand(x20, 16, PreIndex));
2462 __ Ldr(w2, MemOperand(x21, -4, PreIndex));
2463 __ Str(w2, MemOperand(x22, -4, PreIndex));
2464 __ Ldrb(w3, MemOperand(x23, 1, PreIndex));
2465 __ Strb(w3, MemOperand(x24, 25, PreIndex));
[all...]
/external/vixl/src/aarch32/
H A Dmacro-assembler-aarch32.cc2019 case PreIndex:
2035 MemOperand(rn, load_store_offset, PreIndex));
2112 case PreIndex:
2241 case PreIndex: {
2262 MemOperand(rn, load_store_offset, PreIndex));
2321 case PreIndex:
2406 case PreIndex:
2479 case PreIndex:
H A Doperands-aarch32.h843 bool IsPreIndex() const { return GetAddrMode() == PreIndex; }
893 VIXL_ASSERT(addrmode != PreIndex);
901 VIXL_ASSERT(addrmode != PreIndex);
H A Doperands-aarch32.cc542 } else if (operand.GetAddrMode() == PreIndex) {
/external/v8/src/arm64/
H A Dinstructions-arm64.h74 PreIndex, enumerator in enum:v8::internal::AddrMode
H A Dmacro-assembler-arm64.cc935 str(src1, MemOperand(StackPointer(), -size, PreIndex));
1131 str(src0, MemOperand(StackPointer(), -1 * size, PreIndex));
1135 stp(src1, src0, MemOperand(StackPointer(), -2 * size, PreIndex));
1139 stp(src2, src1, MemOperand(StackPointer(), -3 * size, PreIndex));
1146 stp(src3, src2, MemOperand(StackPointer(), -4 * size, PreIndex));
1286 MemOperand tos(csp, -2 * static_cast<int>(kXRegSize), PreIndex);
2343 __ Ldr(tmp_reg, MemOperand(src_reg, -kPointerSize, PreIndex));
2344 __ Str(tmp_reg, MemOperand(dst_reg, -kPointerSize, PreIndex));
/external/vixl/src/aarch64/
H A Dmacro-assembler-aarch64.cc1933 Stp(bottom_0, bottom_1, MemOperand(StackPointer(), -size, PreIndex));
1935 Str(bottom_0, MemOperand(StackPointer(), -size, PreIndex));
2030 str(src0, MemOperand(StackPointer(), -1 * size, PreIndex));
2034 stp(src1, src0, MemOperand(StackPointer(), -2 * size, PreIndex));
2038 stp(src2, src1, MemOperand(StackPointer(), -3 * size, PreIndex));
2045 stp(src3, src2, MemOperand(StackPointer(), -4 * size, PreIndex));
2193 MemOperand tos(sp, -2 * static_cast<int>(kXRegSizeInBytes), PreIndex);
H A Doperands-aarch64.cc478 bool MemOperand::IsPreIndex() const { return addrmode_ == PreIndex; }
H A Dinstructions-aarch64.h141 enum AddrMode { Offset, PreIndex, PostIndex }; enumerator in enum:vixl::aarch64::AddrMode
/external/v8/src/arm/
H A Dconstants-arm.h291 PreIndex = (8|4|1) << 21, // Pre-indexed addressing with writeback. enumerator in enum:v8::internal::AddrMode
/external/v8/src/ic/arm/
H A Dic-arm.cc250 __ ldr(scratch, MemOperand::PointerAddressFromSmiKey(address, key, PreIndex));
305 __ ldr(scratch, MemOperand(address, key, LSL, kPointerSizeLog2, PreIndex));
/external/v8/src/builtins/arm64/
H A Dbuiltins-arm64.cc617 __ Ldp(x10, x11, MemOperand(x4, -2 * kPointerSize, PreIndex));
1195 __ Str(scratch, MemOperand(stack_addr, -kPointerSize, PreIndex));
2918 MemOperand(copy_start, -2 * kPointerSize, PreIndex));
2920 MemOperand(copy_to, -2 * kPointerSize, PreIndex));
2961 MemOperand(copy_from, -2 * kPointerSize, PreIndex));
2963 MemOperand(copy_to, -2 * kPointerSize, PreIndex));
2976 MemOperand(copy_to, -2 * kPointerSize, PreIndex));

Completed in 2989 milliseconds

12