Searched refs:Undef (Results 1 - 25 of 52) sorted by relevance

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/external/llvm/unittests/IR/
H A DAsmWriterTest.cpp26 auto Undef = UndefValue::get(Ty); local
27 std::unique_ptr<BinaryOperator> Add(BinaryOperator::CreateAdd(Undef, Undef));
H A DConstantsTest.cpp31 Constant* Undef = UndefValue::get(Int1); local
59 EXPECT_EQ(Undef, ConstantExpr::getShl(One, One));
67 EXPECT_EQ(Undef, ConstantExpr::getLShr(One, One));
71 EXPECT_EQ(Undef, ConstantExpr::getAShr(One, One));
/external/clang/test/SemaCXX/
H A Dqualified-id-lookup.cpp100 struct Undef { // expected-note{{definition of 'Undef' is not complete until the closing '}'}} struct
103 Undef::type member;
105 static int size = sizeof(Undef); // expected-error{{invalid application of 'sizeof' to an incomplete type 'Undef'}}
110 int Undef::f() {
111 return sizeof(Undef);
/external/valgrind/memcheck/tests/
H A Dorigin1-yes.stderr.exp2 Undef 1 of 8 (stack, 32 bit)
9 Undef 2 of 8 (stack, 32 bit)
16 Undef 3 of 8 (stack, 64 bit)
23 Undef 4 of 8 (mallocd, 32-bit)
31 Undef 5 of 8 (realloc)
39 Undef 6 of 8 (MALLOCLIKE_BLOCK)
46 Undef 7 of 8 (brk)
50 Undef 8 of 8 (MAKE_MEM_UNDEFINED)
H A Dorigin3-no.stderr.exp2 Undef 1 of 8 (8 bit undef)
12 Undef 2 of 8 (8 bits of 32 undef)
20 Undef 3 of 8 (32 bit undef)
30 Undef 4 of 8 (32 bit undef, unaligned)
40 Undef 5 of 8 (32 bit undef, modified)
50 Undef 6 of 8 (32 bit undef, unaligned, strange, #1)
59 Undef 7 of 8 (32 bit undef, unaligned, strange, #2)
68 Undef 8 of 8 (32 bit undef, unaligned, strange, #3)
H A Dorigin2-not-quite.stderr.exp2 Undef 1 of 3 (64-bit FP)
12 Undef 2 of 3 (32-bit FP)
22 Undef 3 of 3 (int)
/external/swiftshader/third_party/LLVM/unittests/VMCore/
H A DConstantsTest.cpp24 Constant* Undef = UndefValue::get(Int1); local
52 EXPECT_EQ(Undef, ConstantExpr::getShl(One, One));
60 EXPECT_EQ(Undef, ConstantExpr::getLShr(One, One));
64 EXPECT_EQ(Undef, ConstantExpr::getAShr(One, One));
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DMachineInstrBuilder.h34 Undef = 0x20, enumerator in enum:llvm::RegState::__anon18336
66 flags & RegState::Undef,
259 return B ? RegState::Undef : 0;
/external/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h37 Undef = 0x20, enumerator in enum:llvm::RegState::__anon12240
41 DefineNoRead = Define | Undef,
78 flags & RegState::Undef,
385 return B ? RegState::Undef : 0;
/external/llvm/lib/Target/X86/
H A DX86WinAllocaExpander.cpp222 .addReg(RegA, RegState::Undef);
233 .addReg(RegA, RegState::Undef);
H A DX86FixupBWInsts.cpp261 // we don't care about the higher bits by reading it as Undef, and adding
265 .addReg(NewSrcReg, RegState::Undef)
/external/llvm/lib/Transforms/Scalar/
H A DStructurizeCFG.cpp588 Value *Undef = UndefValue::get(Phi.getType()); local
589 Phi.addIncoming(Undef, From);
609 Value *Undef = UndefValue::get(Phi->getType()); local
611 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
612 Updater.AddAvailableValue(To, Undef);
623 Updater.AddAvailableValue(Dominator.getResult(), Undef);
912 Value *Undef = UndefValue::get(II->getType()); local
914 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
H A DRewriteStatepointsForGC.cpp850 UndefValue *Undef = UndefValue::get(SI->getType());
852 return SelectInst::Create(SI->getCondition(), Undef, Undef, Name, SI);
854 UndefValue *Undef = UndefValue::get(EE->getVectorOperand()->getType());
856 return ExtractElementInst::Create(Undef, EE->getIndexOperand(), Name,
/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp827 Constant *Undef = UndefValue::get(EltTy); local
832 Elts.push_back(Undef);
835 Elts.push_back(Undef);
857 Constant *Undef = UndefValue::get(EltTy); local
860 Constant *Elt = DemandedElts[i] ? Zero : Undef;
H A DInstCombinePHI.cpp786 Value *Undef = UndefValue::get(FirstPhi.getType()); local
788 ReplaceInstUsesWith(*PHIsToSlice[i], Undef);
789 return ReplaceInstUsesWith(FirstPhi, Undef);
/external/llvm/lib/Target/AMDGPU/
H A DSILowerControlFlow.cpp237 .addReg(AMDGPU::VGPR0, RegState::Undef)
238 .addReg(AMDGPU::VGPR0, RegState::Undef)
239 .addReg(AMDGPU::VGPR0, RegState::Undef)
240 .addReg(AMDGPU::VGPR0, RegState::Undef);
/external/llvm/test/MC/MachO/ARM/
H A Ddarwin-ARM-reloc.s141 @ CHECK: Type: Undef (0x0)
H A Ddarwin-Thumb-reloc.s103 @ CHECK: Type: Undef (0x0)
/external/spirv-llvm/lib/SPIRV/libSPIRV/
H A DSPIRVOpCodeEnum.h2 _SPIRV_OP(Undef, 1)
/external/llvm/lib/Transforms/InstCombine/
H A DInstCombinePHI.cpp858 Value *Undef = UndefValue::get(FirstPhi.getType()); local
860 replaceInstUsesWith(*PHIsToSlice[i], Undef);
861 return replaceInstUsesWith(FirstPhi, Undef);
H A DInstCombineSimplifyDemanded.cpp846 return nullptr; // Undef.
934 Constant *Undef = UndefValue::get(EltTy); local
939 Elts.push_back(Undef);
948 Elts.push_back(Undef);
/external/clang/test/SemaTemplate/
H A Dms-lookup-template-base-classes.cpp526 Undef::staticMethod(); // expected-error {{use of undeclared identifier 'Undef'}}
/external/valgrind/coregrind/m_debuginfo/
H A Dpriv_storage.h427 } Undef; member in union:__anon22891::__anon22892
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1477 SDValue Undef = SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, local
1485 SDValue RetVals[] = { Undef, Ret };
1491 SDValue RetVals[] = { Undef, Ret };
1639 SDValue Undef = SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, local
1646 SDValue RetVals[] = { Undef, Ret };
/external/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp626 unsigned State = RegState::Define | (ReadUndef ? RegState::Undef : 0);
886 MB.addReg(PredOp.getReg(), PredOp.isUndef() ? RegState::Undef : 0,

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