/external/valgrind/none/tests/x86/ |
H A D | insn_basic.def | 21 adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46] 22 adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47] 23 adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46] 24 adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47] 25 adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46] 26 adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47] 33 adcw eflags[0x1,0x0] : imm8[12] r16.uw[3456] => 1.uw[3468] 34 adcw eflags[0x1,0x1] : imm8[12] r16.uw[3456] => 1.uw[3469] 47 adcl eflags[0x1,0x0] : imm8[12] r32.ud[87654321] => 1.ud[87654333] 48 adcl eflags[0x1,0x1] : imm8[1 [all...] |
/external/valgrind/VEX/priv/ |
H A D | guest_generic_x87.h | 127 UInt imm8, Bool isxSTRM ); 136 UInt imm8, Bool isxSTRM );
|
H A D | guest_generic_x87.c | 775 imm8 is the original immediate from the instruction. isSTRM 779 If the given imm8 case can be handled, the return value is True. 788 UInt imm8, Bool isxSTRM ) 790 vassert(imm8 < 0x80); 794 /* Explicitly reject any imm8 values that haven't been validated, 797 switch (imm8) { 807 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 808 UInt agg = (imm8 >> 2) & 3; // imm8[ 784 compute_PCMPxSTRx( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument 1035 compute_PCMPxSTRx_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
H A D | guest_amd64_toIR.c | 7653 /* (sz==4): PSLLgg/PSRAgg/PSRLgg mmxreg by imm8 */ 9090 UInt imm8, Bool all_lanes, Int sz ) 9092 if (imm8 >= 32) return False; 9095 the supplied imm8. */ 9105 switch (imm8) { 9160 /* Don't forget to add test cases to VCMPSS_128_<imm8> in 9225 UInt imm8; local 9235 imm8 = getUChar(delta+1); 9236 if (imm8 >= 8) return delta0; /* FAIL */ 9237 Bool ok = findSSECmpOp(&preSwap, &op, &postNot, imm8, all_lane 9087 findSSECmpOp( Bool* preSwapP, IROp* opP, Bool* postNotP, UInt imm8, Bool all_lanes, Int sz ) argument 11334 UInt imm8; local 11389 UInt imm8; local 11436 UInt imm8; local 14355 Int imm8 = 0; local 18867 Int imm8; local 19308 Int imm8; local 19345 Int imm8; local 19381 Int imm8; local 19470 Int imm8; local 19501 UInt imm8; local 19606 Int imm8; local 19639 Int imm8; local 19671 Int imm8; local 19709 Int imm8; local 23293 UInt imm8; local 23403 UInt imm8; local 26409 Int imm8; local 26453 Int imm8 = 0; local 26483 Int imm8 = 0; local 26513 Int imm8 = 0; local 26543 Int imm8 = 0; local 30143 UInt imm8 = 0; local 30182 UInt imm8 = 0; local 30222 UInt imm8 = 0; local 30265 UInt imm8 = 0; local 30295 UInt imm8 = 0; local 30323 UInt imm8 = 0; local 30356 UInt imm8 = 0; local 30394 UInt imm8 = 0; local 30696 UInt imm8; local 30727 UInt imm8; local 30761 UInt imm8; local 30792 UInt imm8; local 30826 UInt imm8; local 30857 UInt imm8; local 30900 UInt imm8; local 30935 UInt imm8; local 31084 Int imm8; local 31119 UInt imm8; local 31294 Int imm8; local 31324 Int imm8; local 31362 Int imm8; local 31393 Int imm8; local 31428 Int imm8; local 31475 Int imm8; local 31511 UInt imm8 = 0; local 31650 UChar imm8; local [all...] |
H A D | guest_arm_toIR.c | 2458 IRExpr* mk_EA_reg_plusminus_imm8 ( UInt rN, UInt bU, UInt imm8, argument 2463 vassert(imm8 < 0x100); 2465 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm8); 2469 mkU32(imm8) ); 2569 UInt imm1, UInt imm3, UInt imm8 ) 2573 vassert(imm8 < (1<<8)); 2574 UInt i_imm3_a = (imm1 << 4) | (imm3 << 1) | ((imm8 >> 7) & 1); 2575 UInt abcdefgh = imm8; 2576 UInt lbcdefgh = imm8 | 0x80; 2608 UInt imm8 local 13344 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local 13360 UInt imm8 = (INSN(19,16) << 4) | INSN(3,0); local 15343 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local 16466 UInt imm8 = ((insn >> 4) & 0xF0) | (insn & 0xF); /* 11:8, 3:0 */ local 16906 UInt imm8 = (imm4H << 4) | imm4L; local 16962 UInt imm8 = (imm4H << 4) | imm4L; local 17018 UInt imm8 = (imm4H << 4) | imm4L; local 17124 UInt imm8 = (imm4H << 4) | imm4L; local 18337 UInt imm8 = INSN0(7,0); local 18833 UInt imm8 = INSN0(7,0); local 18845 UInt imm8 = INSN0(7,0); local 18887 UInt imm8 = INSN0(7,0); local 18984 UInt imm8 = INSN0(7,0); local 20126 UInt imm8 = INSN1(7,0); local 20594 UInt imm8 = INSN1(7,0); local 21397 UInt imm8 = INSN1(7,0); local 21462 UInt imm8 = INSN1(7,0); local 21600 UInt imm8 = INSN1(7,0); local 21676 UInt imm8 = INSN1(7,0); local 21699 UInt imm8 = INSN1(7,0); local 21720 UInt imm8 = INSN1(7,0); local 21749 UInt imm8 = INSN1(7,0); local 21778 UInt imm8 = INSN1(7,0); local 21800 UInt imm8 = INSN1(7,0); local 21822 UInt imm8 = INSN1(7,0); local 21847 UInt imm8 = INSN1(7,0); local 21883 UInt imm8 = INSN1(7,0); local [all...] |
H A D | guest_amd64_defs.h | 203 opc_and_imm contains (4th byte of opcode << 8) | the-imm8-byte so 276 imm8 is the Round Key constant. 286 HWord imm8,
|
H A D | host_arm_defs.h | 160 ARMam2_RI=3, /* reg +/- imm8 */ 236 ARMri84_I84=7, /* imm8 `ror` (2 * imm4) */ 246 UShort imm8; member in struct:__anon22226::__anon22227::__anon22228 256 extern ARMRI84* ARMRI84_I84 ( UShort imm8, UShort imm4 ); 291 /* imm8 = abcdefgh, B = NOT(b); 316 UInt imm8; member in struct:__anon22235 320 extern ARMNImm* ARMNImm_TI ( UInt type, UInt imm8 );
|
/external/v8/src/x64/ |
H A D | assembler-x64.h | 813 void instruction##p(Register dst, Immediate imm8) { \ 814 shift(dst, imm8, subcode, kPointerSize); \ 817 void instruction##l(Register dst, Immediate imm8) { \ 818 shift(dst, imm8, subcode, kInt32Size); \ 821 void instruction##q(Register dst, Immediate imm8) { \ 822 shift(dst, imm8, subcode, kInt64Size); \ 825 void instruction##p(Operand dst, Immediate imm8) { \ 826 shift(dst, imm8, subcode, kPointerSize); \ 829 void instruction##l(Operand dst, Immediate imm8) { \ 830 shift(dst, imm8, subcod [all...] |
H A D | assembler-x64.cc | 985 void Assembler::cmpb_al(Immediate imm8) { argument 986 DCHECK(is_int8(imm8.value_) || is_uint8(imm8.value_)); 989 emit(imm8.value_); 2828 void Assembler::extractps(Register dst, XMMRegister src, byte imm8) { argument 2830 DCHECK(is_uint8(imm8)); 2838 emit(imm8); 2841 void Assembler::pextrb(Register dst, XMMRegister src, int8_t imm8) { argument 2843 DCHECK(is_uint8(imm8)); 2851 emit(imm8); 2854 pextrb(const Operand& dst, XMMRegister src, int8_t imm8) argument 2867 pinsrw(XMMRegister dst, Register src, int8_t imm8) argument 2878 pinsrw(XMMRegister dst, const Operand& src, int8_t imm8) argument 2889 pextrw(Register dst, XMMRegister src, int8_t imm8) argument 2900 pextrw(const Operand& dst, XMMRegister src, int8_t imm8) argument 2913 pextrd(Register dst, XMMRegister src, int8_t imm8) argument 2925 pextrd(const Operand& dst, XMMRegister src, int8_t imm8) argument 2937 pinsrd(XMMRegister dst, Register src, int8_t imm8) argument 2950 pinsrd(XMMRegister dst, const Operand& src, int8_t imm8) argument 2962 pinsrb(XMMRegister dst, Register src, int8_t imm8) argument 2974 pinsrb(XMMRegister dst, const Operand& src, int8_t imm8) argument 2986 insertps(XMMRegister dst, XMMRegister src, byte imm8) argument 3050 shufps(XMMRegister dst, XMMRegister src, byte imm8) argument 3292 psllq(XMMRegister reg, byte imm8) argument 3304 psrlq(XMMRegister reg, byte imm8) argument 3315 psllw(XMMRegister reg, byte imm8) argument 3325 pslld(XMMRegister reg, byte imm8) argument 3335 psrlw(XMMRegister reg, byte imm8) argument 3345 psrld(XMMRegister reg, byte imm8) argument 3355 psraw(XMMRegister reg, byte imm8) argument 3365 psrad(XMMRegister reg, byte imm8) argument 4373 rorxq(Register dst, Register src, byte imm8) argument 4385 rorxq(Register dst, const Operand& src, byte imm8) argument 4397 rorxl(Register dst, Register src, byte imm8) argument 4409 rorxl(Register dst, const Operand& src, byte imm8) argument [all...] |
/external/vixl/src/aarch32/ |
H A D | instructions-aarch32.cc | 630 uint32_t imm8 = imm >> (24 - shift); local 632 if ((imm8 <= 0xff) && ((imm8 & 0x80) != 0) && (overflow == 0)) { 633 SetEncodingValue(((shift + 8) << 7) | (imm8 & 0x7F)); 687 uint32_t imm8 = (imm << rot) | (imm >> (32 - rot)); local 688 if (imm8 <= 0xff) { 689 SetEncodingValue((rot << 7) | imm8);
|
H A D | operands-aarch32.h | 554 static float Decode(uint32_t imm8, const FloatType<float>&) { argument 555 return VFP::Imm8ToFP32(imm8); 558 static double Decode(uint32_t imm8, const FloatType<double>&) { argument 559 return VFP::Imm8ToFP64(imm8); 627 // - an immediate constant, such as <imm8>, <imm12>
|
/external/v8/src/x87/ |
H A D | assembler-x87.h | 609 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } 610 void mov_b(const Operand& dst, int8_t imm8); 680 void cmpb(Register reg, Immediate imm8) { cmpb(Operand(reg), imm8); } 681 void cmpb(const Operand& op, Immediate imm8); 742 void rcl(Register dst, uint8_t imm8); 743 void rcr(Register dst, uint8_t imm8); 745 void ror(Register dst, uint8_t imm8) { ror(Operand(dst), imm8); } [all...] |
H A D | assembler-x87.cc | 385 void Assembler::mov_b(const Operand& dst, int8_t imm8) { argument 389 EMIT(imm8); 674 void Assembler::cmpb(const Operand& op, Immediate imm8) { argument 675 DCHECK(imm8.is_int8() || imm8.is_uint8()); 683 emit_b(imm8); 940 void Assembler::rcl(Register dst, uint8_t imm8) { argument 942 DCHECK(is_uint5(imm8)); // illegal shift count 943 if (imm8 == 1) { 949 EMIT(imm8); 954 rcr(Register dst, uint8_t imm8) argument 968 ror(const Operand& dst, uint8_t imm8) argument 989 sar(const Operand& dst, uint8_t imm8) argument 1032 shl(const Operand& dst, uint8_t imm8) argument 1052 shr(const Operand& dst, uint8_t imm8) argument 1156 test_b(Register reg, Immediate imm8) argument 1174 test_b(const Operand& op, Immediate imm8) argument 2097 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
H A D | disasm-x87.cc | 563 int imm8 = -1; local 593 imm8 = 1; 595 imm8 = *(data + 1); 600 if (imm8 >= 0) { 601 AppendToBuffer(",%d", imm8); 1131 // shufps xmm, xmm/m128, imm8 1135 int8_t imm8 = static_cast<int8_t>(data[1]); local 1139 static_cast<int>(imm8)); 1157 int8_t imm8 = static_cast<int8_t>(data[1]); local 1160 NameOfCPURegister(regop), static_cast<int>(imm8)); 1361 int8_t imm8 = static_cast<int8_t>(data[1]); local 1371 int8_t imm8 = static_cast<int8_t>(data[1]); local 1381 int8_t imm8 = static_cast<int8_t>(data[1]); local 1391 int8_t imm8 = static_cast<int8_t>(data[1]); local 1462 int8_t imm8 = static_cast<int8_t>(data[1]); local 1491 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | macro-assembler-x87.h | 364 void ShlPair(Register high, Register low, uint8_t imm8); 366 void ShrPair(Register high, Register low, uint8_t imm8); 368 void SarPair(Register high, Register low, uint8_t imm8);
|
/external/valgrind/none/tests/amd64/ |
H A D | insn_mmx.def | 72 pslld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x12345670,0x9abcdef0] 75 psllq imm8[4] mm.uq[0x0123456789abcdef] => 1.uq[0x123456789abcdef0] 78 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0] 81 psrad imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x00123456,0xf89abcde] 84 psraw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x0012,0x0456,0xf89a,0xfcde] 87 psrld imm8[4] mm.ud[0x01234567,0x89abcdef] => 1.ud[0x00123456,0x089abcde] 90 psrlq imm8[4] mm.uq[0x0123456789abcdef] => 1.uq[0x00123456789abcde] 93 psrlw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x0012,0x0456,0x089a,0x0cde]
|
H A D | pcmpstr64w.c | 188 imm8 is the original immediate from the instruction. isSTRM 192 If the given imm8 case can be handled, the return value is True. 201 UInt imm8, Bool isxSTRM ) 203 assert(imm8 < 0x80); 207 /* Explicitly reject any imm8 values that haven't been validated, 210 switch (imm8) { 220 UInt fmt = (imm8 >> 0) & 3; // imm8[1:0] data format 221 UInt agg = (imm8 >> 2) & 3; // imm8[ 197 pcmpXstrX_WRK_wide( V128* resV, UInt* resOSZACP, V128* argLV, V128* argRV, UInt zmaskL, UInt zmaskR, UInt imm8, Bool isxSTRM ) argument [all...] |
/external/v8/src/ia32/ |
H A D | assembler-ia32.cc | 803 void Assembler::cmpb(const Operand& op, Immediate imm8) { argument 804 DCHECK(imm8.is_int8() || imm8.is_uint8()); 812 emit_b(imm8); 1069 void Assembler::rcl(Register dst, uint8_t imm8) { argument 1071 DCHECK(is_uint5(imm8)); // illegal shift count 1072 if (imm8 == 1) { 1078 EMIT(imm8); 1083 void Assembler::rcr(Register dst, uint8_t imm8) { argument 1085 DCHECK(is_uint5(imm8)); // illega 1097 ror(const Operand& dst, uint8_t imm8) argument 1118 sar(const Operand& dst, uint8_t imm8) argument 1161 shl(const Operand& dst, uint8_t imm8) argument 1181 shr(const Operand& dst, uint8_t imm8) argument 1285 test_b(Register reg, Immediate imm8) argument 1303 test_b(const Operand& op, Immediate imm8) argument 2416 shufps(XMMRegister dst, XMMRegister src, byte imm8) argument 2527 extractps(Register dst, XMMRegister src, byte imm8) argument 2851 rorx(Register dst, const Operand& src, byte imm8) argument 2958 emit_arith_b(int op1, int op2, Register dst, int imm8) argument [all...] |
H A D | assembler-ia32.h | 611 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } 687 void cmpb(Register reg, Immediate imm8) { cmpb(Operand(reg), imm8); } 688 void cmpb(const Operand& op, Immediate imm8); 749 void rcl(Register dst, uint8_t imm8); 750 void rcr(Register dst, uint8_t imm8); 752 void ror(Register dst, uint8_t imm8) { ror(Operand(dst), imm8); } 753 void ror(const Operand& dst, uint8_t imm8); [all...] |
H A D | disasm-ia32.cc | 627 int imm8 = -1; local 657 imm8 = 1; 659 imm8 = *(data + 1); 664 if (imm8 >= 0) { 665 AppendToBuffer(",%d", imm8); 1478 // shufps xmm, xmm/m128, imm8 1482 int8_t imm8 = static_cast<int8_t>(data[1]); local 1486 static_cast<int>(imm8)); 1504 int8_t imm8 = static_cast<int8_t>(data[1]); local 1507 NameOfCPURegister(regop), static_cast<int>(imm8)); 1708 int8_t imm8 = static_cast<int8_t>(data[1]); local 1716 int8_t imm8 = static_cast<int8_t>(data[1]); local 1726 int8_t imm8 = static_cast<int8_t>(data[1]); local 1736 int8_t imm8 = static_cast<int8_t>(data[1]); local 1746 int8_t imm8 = static_cast<int8_t>(data[1]); local 1817 int8_t imm8 = static_cast<int8_t>(data[1]); local 1860 int8_t imm8 = static_cast<int8_t>(data[1]); local 1869 int8_t imm8 = static_cast<int8_t>(data[1]); local [all...] |
H A D | macro-assembler-ia32.h | 375 void ShlPair(Register high, Register low, uint8_t imm8); 377 void ShrPair(Register high, Register low, uint8_t imm8); 379 void SarPair(Register high, Register low, uint8_t imm8); 811 void Pextrd(Register dst, XMMRegister src, int8_t imm8); 812 void Pinsrd(XMMRegister dst, Register src, int8_t imm8) { argument 813 Pinsrd(dst, Operand(src), imm8); 815 void Pinsrd(XMMRegister dst, const Operand& src, int8_t imm8);
|
/external/vixl/src/aarch64/ |
H A D | instructions-aarch64.cc | 183 float Instruction::Imm8ToFP32(uint32_t imm8) { argument 187 uint32_t bits = imm8; 200 double Instruction::Imm8ToFP64(uint32_t imm8) { argument 205 uint32_t bits = imm8;
|
H A D | instructions-aarch64.h | 497 static float Imm8ToFP32(uint32_t imm8); 498 static double Imm8ToFP64(uint32_t imm8);
|
/external/vixl/src/ |
H A D | utils-vixl.h | 566 static float Imm8ToFP32(uint32_t imm8) { 570 uint32_t bits = imm8; 578 static double Imm8ToFP64(uint32_t imm8) { 583 uint32_t bits = imm8;
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
H A D | X86DisassemblerDecoder.c | 1394 uint8_t imm8; local 1413 if (consumeByte(insn, &imm8)) 1415 insn->immediates[insn->numImmediatesConsumed] = imm8;
|