Searched refs:lsls (Results 1 - 19 of 19) sorted by relevance

/external/swiftshader/third_party/LLVM/test/MC/ARM/
H A Dthumb-diagnostics.s82 lsls r4, r5, #-1
83 lsls r4, r5, #32
85 @ CHECK-ERRORS: lsls r4, r5, #-1
88 @ CHECK-ERRORS: lsls r4, r5, #32
H A Dbasic-thumb-instructions.s316 lsls r4, r5, #0
317 lsls r4, r5, #4
319 @ CHECK: lsls r4, r5, #0 @ encoding: [0x2c,0x00]
320 @ CHECK: lsls r4, r5, #4 @ encoding: [0x2c,0x01]
326 lsls r2, r6
328 @ CHECK: lsls r2, r6 @ encoding: [0xb2,0x40]
H A Dbasic-thumb2-instructions.s993 lsls r8, r3, #31
994 lsls.w r2, r3, #1
996 lsls r2, r12, #15
999 lsls r8, #2
1000 lsls.w r7, #5
1004 @ CHECK: lsls.w r8, r3, #31 @ encoding: [0x5f,0xea,0xc3,0x78]
1005 @ CHECK: lsls.w r2, r3, #1 @ encoding: [0x5f,0xea,0x43,0x02]
1007 @ CHECK: lsls.w r2, r12, #15 @ encoding: [0x5f,0xea,0xcc,0x32]
1010 @ CHECK: lsls.w r8, r8, #2 @ encoding: [0x5f,0xea,0x88,0x08]
1011 @ CHECK: lsls
[all...]
/external/llvm/test/MC/ARM/
H A Dbasic-thumb-instructions.s353 lsls r4, r5, #0
354 lsls r4, r5, #4
355 lsls r3, #12
356 lsls r3, r3, #12
357 lsls r1, r3, #12
359 @ CHECK: lsls r4, r5, #0 @ encoding: [0x2c,0x00]
360 @ CHECK: lsls r4, r5, #4 @ encoding: [0x2c,0x01]
361 @ CHECK: lsls r3, r3, #12 @ encoding: [0x1b,0x03]
362 @ CHECK: lsls r3, r3, #12 @ encoding: [0x1b,0x03]
363 @ CHECK: lsls r
[all...]
H A Dthumb_rewrites.s71 lsls r0, r0, r1
72 @ CHECK: lsls r0, r1 @ encoding: [0x88,0x40]
H A Dthumb-diagnostics.s154 lsls r4, r5, #-1
155 lsls r4, r5, #32
157 @ CHECK-ERRORS: lsls r4, r5, #-1
160 @ CHECK-ERRORS: lsls r4, r5, #32
H A Dbasic-thumb2-instructions.s1302 lsls r8, r3, #31
1303 lsls.w r2, r3, #1
1305 lsls r2, r12, #15
1308 lsls r8, #2
1309 lsls.w r7, #5
1313 @ CHECK: lsls.w r8, r3, #31 @ encoding: [0x5f,0xea,0xc3,0x78]
1314 @ CHECK: lsls.w r2, r3, #1 @ encoding: [0x5f,0xea,0x43,0x02]
1316 @ CHECK: lsls.w r2, r12, #15 @ encoding: [0x5f,0xea,0xcc,0x32]
1319 @ CHECK: lsls.w r8, r8, #2 @ encoding: [0x5f,0xea,0x88,0x08]
1320 @ CHECK: lsls
[all...]
/external/valgrind/none/tests/arm/
H A Dv6intARM.stdout.exp53 lsls r0, r1, r2 :: rd 0xffffffff rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x80000000 N
54 lsls r0, r1, r2 :: rd 0xfffffffe rm 0xffffffff, rn 0x00000001, carryin 0, cpsr 0xa0000000 N C
55 lsls r0, r1, r2 :: rd 0xfffffffc rm 0xffffffff, rn 0x00000002, carryin 0, cpsr 0xa0000000 N C
56 lsls r0, r1, r2 :: rd 0x80000000 rm 0xffffffff, rn 0x0000001f, carryin 0, cpsr 0xa0000000 N C
57 lsls r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000020, carryin 0, cpsr 0x60000000 ZC
58 lsls r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000021, carryin 0, cpsr 0x40000000 Z
59 lsls r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x0000003f, carryin 0, cpsr 0x40000000 Z
60 lsls r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000040, carryin 0, cpsr 0x40000000 Z
61 lsls r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x000000ff, carryin 0, cpsr 0x40000000 Z
62 lsls r
[all...]
H A Dv6intThumb.stdout.exp380 lsls r1, r2 :: rd 0x31415927 rm 0x00000000, c:v-in 0, cpsr 0x00000000
381 lsls r1, r2 :: rd 0x6282b24e rm 0x00000001, c:v-in 0, cpsr 0x00000000
382 lsls r1, r2 :: rd 0xc505649c rm 0x00000002, c:v-in 0, cpsr 0x80000000 N
383 lsls r1, r2 :: rd 0xac938000 rm 0x0000000f, c:v-in 0, cpsr 0x80000000 N
384 lsls r1, r2 :: rd 0x59270000 rm 0x00000010, c:v-in 0, cpsr 0x20000000 C
385 lsls r1, r2 :: rd 0x80000000 rm 0x0000001f, c:v-in 0, cpsr 0xa0000000 N C
386 lsls r1, r2 :: rd 0x00000000 rm 0x00000020, c:v-in 0, cpsr 0x60000000 ZC
387 lsls r1, r2 :: rd 0x00000000 rm 0x00000021, c:v-in 0, cpsr 0x40000000 Z
388 lsls r1, r2 :: rd 0x31415927 rm 0x00000000, c:v-in 1, cpsr 0x10000000 V
389 lsls r
[all...]
/external/libhevc/common/arm/
H A Dihevc_inter_pred_luma_copy_w16out.s95 lsls r6,r3,#1
137 lsls r5,r3,#1
H A Dihevc_inter_pred_chroma_copy_w16out.s123 lsls r6,r3,#1
194 lsls r5,r3,#1
/external/vixl/src/aarch32/
H A Dassembler-aarch32.h2488 void lsls(Condition cond,
2493 void lsls(Register rd, Register rm, const Operand& operand) { function in class:vixl::aarch32::Assembler
2494 lsls(al, Best, rd, rm, operand);
2496 void lsls(Condition cond, Register rd, Register rm, const Operand& operand) { function in class:vixl::aarch32::Assembler
2497 lsls(cond, Best, rd, rm, operand);
2499 void lsls(EncodingSize size, function in class:vixl::aarch32::Assembler
2503 lsls(al, size, rd, rm, operand);
H A Ddisasm-aarch32.h760 void lsls(Condition cond,
H A Ddisasm-aarch32.cc1843 void Disassembler::lsls(Condition cond, function in class:vixl::aarch32::Disassembler
7180 lsls(Condition::None(), Best, Register(rd), Register(rm), amount);
7368 lsls(Condition::None(),
18848 lsls(Condition::None(),
18858 lsls(CurrentCond(),
20780 lsls(Condition::None(),
20787 lsls(CurrentCond(),
[all...]
H A Dassembler-aarch32.cc6145 void Assembler::lsls(Condition cond, function in class:vixl::aarch32::Assembler
6204 Delegate(kLsls, &Assembler::lsls, cond, size, rd, rm, operand);
H A Dmacro-assembler-aarch32.h2366 lsls(cond, rd, rm, operand);
/external/vixl/test/aarch32/
H A Dtest-assembler-cond-rd-rn-operand-rm-a32.cc81 M(lsls) \
661 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-a32-lsls.h"
H A Dtest-assembler-cond-rd-rn-operand-rm-t32.cc81 M(lsls) \
661 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-t32-lsls.h"
/external/libjpeg-turbo/simd/
H A Djsimd_arm_neon.S2813 lsls r8, r8, #0x1
2853 lsls r8, r8, #0x1

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