Searched refs:sreg (Results 1 - 14 of 14) sorted by relevance

/external/v8/src/arm/
H A Dsimulator-arm.h170 void set_s_register_from_float(int sreg, const float flt) { argument
171 SetVFPRegister<float, 1>(sreg, flt);
174 float get_float_from_s_register(int sreg) { argument
175 return GetFromVFPRegister<float, 1>(sreg);
178 void set_s_register_from_sinteger(int sreg, const int sint) { argument
179 SetVFPRegister<int, 1>(sreg, sint);
182 int get_sinteger_from_s_register(int sreg) { argument
183 return GetFromVFPRegister<int, 1>(sreg);
H A Dsimulator-arm.cc942 void Simulator::set_s_register(int sreg, unsigned int value) { argument
943 DCHECK((sreg >= 0) && (sreg < num_s_registers));
944 vfp_registers_[sreg] = value;
948 unsigned int Simulator::get_s_register(int sreg) const {
949 DCHECK((sreg >= 0) && (sreg < num_s_registers));
950 return vfp_registers_[sreg];
2237 SRegister sreg = static_cast<SRegister>(instr->BitField(22, 22)); local
2238 set_register(rd, GetFromSpecialRegister(sreg));
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/external/vixl/test/aarch32/
H A Dtest-utils-aarch32.cc127 const SRegister& sreg) {
128 return Equal32(expected, core, core->GetSRegisterBits(sreg.GetCode()));
209 const SRegister& sreg) {
211 uint32_t result = core->GetSRegisterBits(sreg.GetCode());
125 Equal32(uint32_t expected, const RegisterDump* core, const SRegister& sreg) argument
207 EqualFP32(float expected, const RegisterDump* core, const SRegister& sreg) argument
H A Dtest-utils-aarch32.h174 const SRegister& sreg);
/external/v8/src/arm64/
H A Dsimulator-arm64.cc1666 case STR_s: MemoryWrite<float>(address, sreg(srcdst)); break;
1795 MemoryWrite<float>(address, sreg(rt));
1796 MemoryWrite<float>(address2, sreg(rt2));
2264 case FCVTAS_ws: set_wreg(dst, FPToInt32(sreg(src), FPTieAway)); break;
2265 case FCVTAS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieAway)); break;
2268 case FCVTAU_ws: set_wreg(dst, FPToUInt32(sreg(src), FPTieAway)); break;
2269 case FCVTAU_xs: set_xreg(dst, FPToUInt64(sreg(src), FPTieAway)); break;
2273 set_wreg(dst, FPToInt32(sreg(src), FPNegativeInfinity));
2276 set_xreg(dst, FPToInt64(sreg(src), FPNegativeInfinity));
2285 set_wreg(dst, FPToUInt32(sreg(sr
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H A Dsimulator-arm64.h421 float sreg(unsigned code) const {
439 case kSRegSizeInBits: return sreg(code);
/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DMemRegion.h530 CodeTextRegion(const MemRegion *sreg, Kind k) : TypedRegion(sreg, k) {} argument
544 FunctionCodeRegion(const NamedDecl *fd, const MemRegion* sreg) argument
545 : CodeTextRegion(sreg, FunctionCodeRegionKind), FD(fd) {
594 AnalysisDeclContext *ac, const MemRegion* sreg)
595 : CodeTextRegion(sreg, BlockCodeRegionKind), BD(bd), AC(ac), locTy(lTy) {}
636 unsigned count, const MemRegion *sreg)
637 : TypedRegion(sreg, BlockDataRegionKind), BC(bc), LC(lc),
712 SymbolicRegion(const SymbolRef s, const MemRegion* sreg) argument
713 : SubRegion(sreg, SymbolicRegionKin
593 BlockCodeRegion(const BlockDecl *bd, CanQualType lTy, AnalysisDeclContext *ac, const MemRegion* sreg) argument
635 BlockDataRegion(const BlockCodeRegion *bc, const LocationContext *lc, unsigned count, const MemRegion *sreg) argument
742 StringRegion(const StringLiteral* str, const MemRegion* sreg) argument
778 ObjCStringRegion(const ObjCStringLiteral* str, const MemRegion* sreg) argument
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/external/vixl/test/aarch64/
H A Dtest-utils-aarch64.h103 inline float sreg(unsigned code) const { function in class:vixl::aarch64::RegisterDump
H A Dtest-utils-aarch64.cc183 return EqualFP32(expected, core, core->sreg(fpreg.GetCode()));
/external/valgrind/VEX/priv/
H A Dguest_x86_toIR.c484 static Int segmentGuestRegOffset ( UInt sreg )
486 switch (sreg) {
561 static IRExpr* getSReg ( UInt sreg )
563 return IRExpr_Get( segmentGuestRegOffset(sreg), Ity_I16 );
566 static void putSReg ( UInt sreg, IRExpr* e ) argument
569 stmt( IRStmt_Put( segmentGuestRegOffset(sreg), e ) );
1290 static const HChar* nameSReg ( UInt sreg )
1292 switch (sreg) {
1423 Int sreg; local
1432 case 0x3E: sreg
6922 dis_push_segreg( UInt sreg, Int sz ) argument
6937 dis_pop_segreg( UInt sreg, Int sz ) argument
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H A Dguest_amd64_toIR.c2156 static const HChar* nameSReg ( UInt sreg )
2158 switch (sreg) {
2368 //.. Int sreg;
2377 //.. case 0x3E: sreg = R_DS; break;
2378 //.. case 0x26: sreg = R_ES; break;
2379 //.. case 0x64: sreg = R_FS; break;
2380 //.. case 0x65: sreg = R_GS; break;
2391 //.. assign( seg_selector, unop(Iop_16Uto32, getSReg(sreg)) );
8648 mov sreg, reg-or-mem
8661 S(src) is sreg
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/external/clang/lib/StaticAnalyzer/Core/
H A DMemRegion.cpp333 const MemRegion *sreg) {
336 ID.AddPointer(sreg);
332 ProfileRegion(llvm::FoldingSetNodeID& ID, SymbolRef sym, const MemRegion *sreg) argument
/external/vixl/src/aarch32/
H A Dassembler-aarch32.cc18247 const SRegister& sreg = sreglist.GetFirstSRegister(); local
18250 (write_back.GetWriteBackUint32() << 21) | sreg.Encode(22, 12) |
18257 const SRegister& sreg = sreglist.GetFirstSRegister(); local
18260 (write_back.GetWriteBackUint32() << 21) | sreg.Encode(22, 12) |
18312 const SRegister& sreg = sreglist.GetFirstSRegister(); local
18314 EmitT32_32(0xed300a00U | (rn.GetCode() << 16) | sreg.Encode(22, 12) |
18322 const SRegister& sreg = sreglist.GetFirstSRegister(); local
18325 sreg.Encode(22, 12) | (len & 0xff));
18376 const SRegister& sreg = sreglist.GetFirstSRegister(); local
18379 (write_back.GetWriteBackUint32() << 21) | sreg
18386 const SRegister& sreg = sreglist.GetFirstSRegister(); local
21178 const SRegister& sreg = sreglist.GetFirstSRegister(); local
21186 const SRegister& sreg = sreglist.GetFirstSRegister(); local
21229 const SRegister& sreg = sreglist.GetFirstSRegister(); local
21237 const SRegister& sreg = sreglist.GetFirstSRegister(); local
25766 const SRegister& sreg = sreglist.GetFirstSRegister(); local
25776 const SRegister& sreg = sreglist.GetFirstSRegister(); local
25831 const SRegister& sreg = sreglist.GetFirstSRegister(); local
25841 const SRegister& sreg = sreglist.GetFirstSRegister(); local
25895 const SRegister& sreg = sreglist.GetFirstSRegister(); local
25905 const SRegister& sreg = sreglist.GetFirstSRegister(); local
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/external/vixl/src/aarch64/
H A Dsimulator-aarch64.h1106 VIXL_DEPRECATED("ReadSRegister", float sreg(unsigned code) const) {

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