Searched refs:tiling_mode (Results 1 - 16 of 16) sorted by relevance

/external/libdrm/intel/
H A Dintel_bufmgr_priv.h72 uint32_t tiling_mode, uint32_t stride,
88 * 'tiling_mode' field on return, as well as the pitch value, which
94 uint32_t *tiling_mode,
228 * \param tiling_mode desired, and returned tiling mode
230 int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
237 * \param tiling_mode returned tiling mode
240 int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
H A Dintel_bufmgr.c69 uint32_t tiling_mode,
75 return bufmgr->bo_alloc_userptr(bufmgr, name, addr, tiling_mode,
82 int x, int y, int cpp, uint32_t *tiling_mode,
86 tiling_mode, pitch, flags);
243 drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, argument
247 return bo->bufmgr->bo_set_tiling(bo, tiling_mode, stride);
249 *tiling_mode = I915_TILING_NONE;
254 drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, argument
258 return bo->bufmgr->bo_get_tiling(bo, tiling_mode, swizzle_mode);
260 *tiling_mode
67 drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, const char *name, void *addr, uint32_t tiling_mode, uint32_t stride, unsigned long size, unsigned long flags) argument
81 drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, int x, int y, int cpp, uint32_t *tiling_mode, unsigned long *pitch, unsigned long flags) argument
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H A Dintel_bufmgr_gem.c189 uint32_t tiling_mode; member in struct:_drm_intel_bo_gem
301 drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
306 uint32_t tiling_mode,
323 uint32_t *tiling_mode)
328 if (*tiling_mode == I915_TILING_NONE)
345 *tiling_mode = I915_TILING_NONE;
366 unsigned long pitch, uint32_t *tiling_mode)
374 if (*tiling_mode == I915_TILING_NONE)
377 if (*tiling_mode == I915_TILING_X
379 && *tiling_mode
322 drm_intel_gem_bo_tile_size(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long size, uint32_t *tiling_mode) argument
365 drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long pitch, uint32_t *tiling_mode) argument
717 drm_intel_gem_bo_alloc_internal(drm_intel_bufmgr *bufmgr, const char *name, unsigned long size, unsigned long flags, uint32_t tiling_mode, unsigned long stride, unsigned int alignment) argument
882 drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name, int x, int y, int cpp, uint32_t *tiling_mode, unsigned long *pitch, unsigned long flags) argument
934 drm_intel_gem_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, const char *name, void *addr, uint32_t tiling_mode, uint32_t stride, unsigned long size, unsigned long flags) argument
1055 check_bo_alloc_userptr(drm_intel_bufmgr *bufmgr, const char *name, void *addr, uint32_t tiling_mode, uint32_t stride, unsigned long size, unsigned long flags) argument
2499 drm_intel_gem_bo_set_tiling_internal(drm_intel_bo *bo, uint32_t tiling_mode, uint32_t stride) argument
2537 drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, uint32_t stride) argument
2565 drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, uint32_t * swizzle_mode) argument
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H A Dintel_bufmgr.h122 void *addr, uint32_t tiling_mode,
128 uint32_t *tiling_mode,
160 int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
162 int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
H A Dintel_bufmgr_fake.c845 uint32_t *tiling_mode,
852 *tiling_mode = I915_TILING_NONE;
842 drm_intel_fake_bo_alloc_tiled(drm_intel_bufmgr * bufmgr, const char *name, int x, int y, int cpp, uint32_t *tiling_mode, unsigned long *pitch, unsigned long flags) argument
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Dintel_tex_subimage.c57 uint32_t tiling_mode = I915_TILING_NONE; local
97 &tiling_mode,
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dintel_tex_subimage.c57 uint32_t tiling_mode = I915_TILING_NONE; local
97 &tiling_mode,
/external/mesa3d/src/mesa/drivers/dri/intel/
H A Dintel_tex_subimage.c57 uint32_t tiling_mode = I915_TILING_NONE; local
97 &tiling_mode,
/external/mesa3d/src/gallium/winsys/i915/drm/
H A Di915_drm_buffer.c64 uint32_t tiling_mode = *tiling; local
76 &tiling_mode, &pitch, 0);
82 *tiling = tiling_mode;
/external/mesa3d/src/gallium/state_trackers/vega/
H A Dapi_filters.c55 VGTilingMode tiling_mode; member in struct:filter_info
193 switch (info->tiling_mode) {
269 info.tiling_mode = VG_TILE_PAD;
379 info.tiling_mode = tilingMode;
569 info.tiling_mode = tilingMode;
628 info.tiling_mode = VG_TILE_PAD;
699 info.tiling_mode = VG_TILE_PAD;
H A Dpaint.c74 VGTilingMode tiling_mode; member in struct:vg_paint::__anon14952
497 paint->pattern.tiling_mode = mode;
634 return paint->pattern.tiling_mode;
/external/libdrm/libkms/
H A Dintel.c127 tile.tiling_mode = I915_TILING_X;
/external/kernel-headers/original/uapi/drm/
H A Di915_drm.h976 * Buffer contents become undefined when changing tiling_mode.
978 __u32 tiling_mode; member in struct:drm_i915_gem_set_tiling
1001 __u32 tiling_mode; member in struct:drm_i915_gem_get_tiling
/external/libdrm/include/drm/
H A Di915_drm.h893 * Buffer contents become undefined when changing tiling_mode.
895 __u32 tiling_mode; member in struct:drm_i915_gem_set_tiling
918 __u32 tiling_mode; member in struct:drm_i915_gem_get_tiling
/external/valgrind/include/vki/
H A Dvki-linux-drm.h788 __vki_u32 tiling_mode; member in struct:vki_drm_i915_gem_set_tiling
794 __vki_u32 tiling_mode; member in struct:vki_drm_i915_gem_get_tiling
/external/valgrind/coregrind/m_syswrap/
H A Dsyswrap-linux.c7228 PRE_MEM_READ("ioctl(DRM_I915_GEM_SET_TILING).tiling_mode", (Addr)&data->tiling_mode, sizeof(data->tiling_mode));
7237 PRE_MEM_WRITE("ioctl(DRM_I915_GEM_GET_TILING).tiling_mode", (Addr)&data->tiling_mode, sizeof(data->tiling_mode));
9643 POST_MEM_WRITE((Addr)&data->tiling_mode, sizeof(data->tiling_mode));
9651 POST_MEM_WRITE((Addr)&data->tiling_mode, sizeof(data->tiling_mode));
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