| de2d8694e25a814696358e95141f4b1aa4d8847e |
|
20-Sep-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r275480
Bug: http://b/31320715
This merges commit 7dcf7f03e005379ef2f06db96aa93f06186b66d5 from
aosp/dev.
Test: Build AOSP and run RenderScript tests (host tests for slang and
libbcc, RsTest, CTS)
Change-Id: Iaf3738f74312d875e69f61d604ac058f381a2a1a
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| f3ef5332fa3f4d5ec72c178a2b19dac363a19383 |
|
04-Mar-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r256229
http://b/26987366
Change-Id: I1f29c4676a8abe633ab5707dded58d846c973d50
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| ebe69fe11e48d322045d5949c83283927a0d790b |
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23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| bba9390fc6c0d536172c6bb4a9c93db557c1aff4 |
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01-Oct-2013 |
Tim Northover <tnorthover@apple.com> |
ARM: support interrupt attribute
This function-attribute modifies the callee-saved register list and function
epilogue (specifically the return instruction) so that a routine is suitable
for use as an interrupt-handler of the specified type without disrupting
user-mode applications.
rdar://problem/14207019
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191766 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 62da588a2eb70166e1b6cc332d8084f03117dc12 |
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04-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Have ARMBaseRegisterInfo::getCallPreservedMask return the 'correct' mask for the GHC calling convention.
This is purely academic because GHC calls are always tail calls so the register mask will never be used; however, this change makes the code clearer and brings the ARM implementation of the GHC calling convention in line with the X86 implementation. Also, it might save someone else some time trying to figuring out what is happening...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185592 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 78e3c90419ffbe969bd38c7a198300af42fb66fc |
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22-Apr-2013 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Fix for 5.5 Parameter Passing --> Stage C:
-- C.4 and C.5 statements, when NSAA is not equal to SP.
-- C.1.cp statement for VA functions. Note: There are no VFP CPRCs in a
variadic procedure.
Before this patch "NSAA != 0" means "don't use GPRs anymore ". But there are
some exceptions in AAPCS.
1. For non VA function: allocate all VFP regs for CPRC. When all VFPs are allocated
CPRCs would be sent to stack, while non CPRCs may be still allocated in GRPs.
2. Check that for VA functions all params uses GPRs and then stack.
No exceptions, no CPRCs here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 456ca048af35163b9f52187e92a23ee0a9f059e8 |
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20-Apr-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Add CodeGen support for functions that always return arguments via a new parameter attribute 'returned', which is taken advantage of in target-independent tail call opportunity detection and in ARM call lowering (when placed on an integral first parameter).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| e7bd51980a1341fb60322e5922cfcc0c9b92b165 |
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07-Nov-2012 |
Chad Rosier <mcrosier@apple.com> |
Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering all
registers. Previously, the register we being marked as implicitly defined, but
not killed. In some cases this would cause the register scavenger to spill a
dead register.
Also, use an empty register mask to simplify the logic and to reduce the memory
footprint.
rdar://12592448
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| a41db53f664f2ea943004f72be5cf575ba2d5d39 |
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13-Aug-2012 |
Manman Ren <mren@apple.com> |
ARM: enable struct byval for AAPCS-VFP.
This change is to be enabled in clang.
rdar://9877866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161789 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| d9b45125935b05578255501a7e05fba9de603609 |
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10-Aug-2012 |
Manman Ren <mren@apple.com> |
ARM: enable struct byval for AAPCS.
This change is to be enabled in clang.
rdar://9877866
PR://13350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| e94ac8871a1ac79bece57335d2abece0feed9c02 |
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03-Aug-2012 |
Eric Christopher <echristo@apple.com> |
Add support for the ARM GHC calling convention, this patch was in 3.0,
but somehow managed to be dropped later.
Patch by Karel Gardas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161226 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| ef1a3a25b3398768b9fad5526782675b1a8c128f |
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17-Apr-2012 |
Jay Foad <jay.foad@gmail.com> |
Remove unused CCIfSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 3ee7d15284f188672e9e429e9e5cf7b870698677 |
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18-Jan-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Implement ARMBaseRegisterInfo::getCallPreservedMask().
Move ARM callee-saved lists into ARMCallingConv.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 0eff39f2e25e9d8dd52b1eb7fa4e7cc6cc77875f |
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08-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
Enable support for returning i1, i8, and i16. Nothing special todo as it's the
callee's responsibility to sign or zero-extend the return value. The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 62c8e8e3f65a2943cedbce37a6b9b47653f0ea0a |
|
07-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
Allow i1 to be promoted to i32 for ARM AAPCS and AAPCS-VFP calling convention as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 38f5c0da6d3097ddd65aaab15ce22c1b95d52902 |
|
05-Nov-2011 |
Chad Rosier <mcrosier@apple.com> |
Allow i1 to be promoted to i32 for ARM APCS calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| c73158730d43e7c8bdef32b2107566a6e78a8538 |
|
20-Apr-2011 |
Stuart Hastings <stuart@apple.com> |
ARM byval support. Will be enabled by another patch to the FE. <rdar://problem/7662569>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129858 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| f222e595c0137b8a9571408257f7000c2fb95473 |
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28-Feb-2011 |
Stuart Hastings <stuart@apple.com> |
Support for byval parameters on ARM. Will be enabled by a forthcoming
patch to the front-end. Radar 7662569.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 76f920d316dc6a9e5e77c8e36f9312d1708e376b |
|
22-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add fastcc cc: pass and return VFP / NEON values in registers. Controlled by -arm-fastcc for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117119 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 23e70ebf352ff4938210711464c68b5a6e46e61c |
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17-Aug-2010 |
Chris Lattner <sabre@nondot.org> |
fix emacs language spec's, patch by Edmund Grimley-Evans!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111241 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| 55e958746901ef8c04f370e746a7538137d0bcf8 |
|
06-Aug-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix eabi calling convention when a 64 bit value shadows r3.
Without this what was happening was:
* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
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| f87611272bd9b97c738e18ed046b38e0b5acdebb |
|
27-Oct-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Correctly align double arguments in the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 567d14f07cd62bfb9dd0edd90144a0a840450f7a |
|
05-Aug-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Missed pieces for ARM HardFP ABI.
Patch by Sandeep Patel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78225 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 5bafff36c798608a189c517d37527e4a38863071 |
|
23-Jun-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add support for ARM's Advanced SIMD (NEON) instruction set.
This is still a work in progress but most of the NEON instruction set
is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 385f5a99ecc7fee48a7539bc63d3e1d3b5089c0d |
|
16-Jun-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Address review comments: add 3 ARM calling conventions.
Dispatch C calling conv. to one of these conventions based on
target triple and subtarget features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73530 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 2e7ccfce98b925d07788fdd08cccc9ddb3d7004b |
|
09-Jun-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 0eebf653a7b2978e7761f8d068b6fbec22aea0f6 |
|
09-Jun-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
The attached patches implement most of the ARM AAPCS-VFP hard float
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.
Patch by Sandeep Patel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 04746eae49f1cc28e787b67256a37bf91481bb90 |
|
19-May-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and
the stack. Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 1c2c462d0f993e3575888d5825b9c25348e6e4e8 |
|
24-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Remove unnecessary references to f32 types. After specifying that f32
should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69973 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| dee46d7f6d61ca628725b54c2d24154ebe70ed96 |
|
17-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Clean up formatting, remove trailing whitespace, fix comment typos and
punctuation. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|
| 1f595bb42950088ccb8246e6b065a96027b46ec6 |
|
17-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Use CallConvLower.h and TableGen descriptions of the calling conventions
for ARM. Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMCallingConv.td
|