de2d8694e25a814696358e95141f4b1aa4d8847e |
|
20-Sep-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r275480 Bug: http://b/31320715 This merges commit 7dcf7f03e005379ef2f06db96aa93f06186b66d5 from aosp/dev. Test: Build AOSP and run RenderScript tests (host tests for slang and libbcc, RsTest, CTS) Change-Id: Iaf3738f74312d875e69f61d604ac058f381a2a1a
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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f3ef5332fa3f4d5ec72c178a2b19dac363a19383 |
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04-Mar-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r256229 http://b/26987366 Change-Id: I1f29c4676a8abe633ab5707dded58d846c973d50
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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6948897e478cbd66626159776a8017b3c18579b9 |
|
01-Jul-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r239765 Bug: 20140355: This rebase pulls the upstream fix for the spurious warnings mentioned in the bug. Change-Id: I7fd24253c50f4d48d900875dcf43ce3f1721a3da
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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0c7f116bb6950ef819323d855415b2f2b0aad987 |
|
06-May-2015 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r235153 Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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ebe69fe11e48d322045d5949c83283927a0d790b |
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23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699. Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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37ed9c199ca639565f6ce88105f9e39e898d82d0 |
|
01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494. Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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c6a4f5e819217e1e12c458aed8e7b122e23a3a58 |
|
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749. Includes a cherry-pick of: r212948 - fixes a small issue with atomic calls Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
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29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712). Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a. Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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5c042162beb3c2dd556e00aab84c4278a69cd5b1 |
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04-Nov-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS branch instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193992 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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1aaf43c2a2ec0fd4c8dbfe56558237219c5f8af7 |
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29-Oct-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS jump instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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0082717cb537e2d1424f755a49510fa9f9e67071 |
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23-Oct-2013 |
Zoran Jovanovic <zoran.jovanovic@imgtec.com> |
Support for microMIPS relocations 1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193247 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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c3cee57f7d20f69a84fd88464ed8cf050e63c7ad |
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09-Sep-2013 |
Bill Wendling <isanbard@gmail.com> |
Generate compact unwind encoding from CFI directives. We used to generate the compact unwind encoding from the machine instructions. However, this had the problem that if the user used `-save-temps' or compiled their hand-written `.s' file (with CFI directives), we wouldn't generate the compact unwind encoding. Move the algorithm that generates the compact unwind encoding into the MCAsmBackend. This way we can generate the encoding whether the code is from a `.ll' or `.s' file. <rdar://problem/13623355> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190290 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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4a50e53e53816076584c957741cb430899271726 |
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08-Jan-2013 |
Jack Carter <jcarter@mips.com> |
This patch produces the correct addend value for an R_MIPS_GPREL16 relocation. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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251040bc18eedfa56d01fe92836e55cfd8c5d990 |
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08-Jan-2013 |
Eli Bendersky <eliben@google.com> |
Renamed MCInstFragment to MCRelaxableFragment and added some comments. No change in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171822 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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198ad916d736047f8a439f19dee25cee917df8a9 |
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22-Nov-2012 |
Jack Carter <jcarter@mips.com> |
Mips direct object xgot support This patch provides support for the MIPS relocations: *) R_MIPS_GOT_HI16 *) R_MIPS_GOT_LO16 *) R_MIPS_CALL_HI16 *) R_MIPS_CALL_LO16 These are used for large GOT instruction sequences. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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536a88ad5bf160232205192a7ce72e50bfadbded |
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18-Sep-2012 |
Roman Divacky <rdivacky@freebsd.org> |
When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164132 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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c5252da873d547a19069eaf9030fec203f128f66 |
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14-Sep-2012 |
Dmitri Gribenko <gribozavr@gmail.com> |
Fix Doxygen issues: * wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param instead of \arg to document parameters in order to be consistent with the rest of the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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67c8978617c3bce9d07210f93f6c64c715f77695 |
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12-Sep-2012 |
Dmitri Gribenko <gribozavr@gmail.com> |
Fix a couple of Doxygen comment issues pointed out by -Wdocumentation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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e2245bab3ca29dc2142d8f254005f4ae7c40cde2 |
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07-Aug-2012 |
Jack Carter <jcarter@mips.com> |
Mips relocation R_MIPS_64 relocates a 64 bit double word. I hit this in a very large program (spirit.cpp), but have not figured out how to make a small make check test for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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fc54d9e47a1276650f14f38e7d037c9b58c8dc2d |
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06-Aug-2012 |
Jack Carter <jcarter@mips.com> |
Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST. These 2 relocations gain access to the highest and the second highest 16 bits of a 64 bit object. R_MIPS_HIGHER %higher(A+S) The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ]. R_MIPS_HIGHEST %highest(A+S) The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ]. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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fd506efec628819f7e6fad8016a9dbb5d8612b8b |
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13-Jul-2012 |
Jack Carter <jcarter@mips.com> |
The Mips specific relocation R_MIPS_GOT_DISP is used in cases where global symbols are directly represented in the GOT and we use an offset into the global offset table. This patch adds direct object support for R_MIPS_GOT_DISP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160183 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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1d82115042c81793cc3d807a8136f7f0f475f083 |
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12-Jul-2012 |
Jack Carter <jcarter@mips.com> |
Patch for Mips direct object generation. When WriteFragmentData() case FT_align called Asm.getBackend().writeNopData() is called, nothing is done since Mips implementation of writeNopData just returned "true". For some reason this has not caused problems in 32 bit mode, but in 64 bit mode it caused an assert when processing multiple function units. The test case included will assert without this patch. It runs twice with different flags to prevent false positives due to changes in code generation over time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160084 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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39ae36337f87b1530c1680ae561c952c827d6e88 |
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02-Jul-2012 |
Jack Carter <jcarter@mips.com> |
Pass the correct ELFOSABI enumeration to the MipsELFObjectWriter constructor Contributer: Sasa Stankovic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159574 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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0140e55393c4403ab240c386501cdc5e438dcc0e |
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28-Jun-2012 |
Jack Carter <jcarter@mips.com> |
This allows hello world to be compiled for Mips 64 direct object. It takes advantage of r159299 which introduces relocation support for N64. elf-dump needed to be upgraded to support N64 relocations as well. This passes make check. Jack git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159301 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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864f66085cd9543070ef01b9f7371c110ecd7898 |
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14-Jun-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Fix coding style violations. Remove white spaces and tabs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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3ef7edc77ace78ba6382adb63c1ac03326d4a615 |
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16-Apr-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Do not add offset in applyFixup. This has already been accounted for in Value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154838 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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a551a48402385cf3f4b754dc72264b2f0974b1a6 |
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02-Apr-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Initial 64 bit direct object support. This patch allows llvm to recognize that a 64 bit object file is being produced and that the subsequently generated ELF header has the correct information. The test case checks for both big and little endian flavors. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153889 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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59182f9425dba2d5e0035155bd2b0a04c6ababb3 |
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27-Mar-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Retrieve and add the offset of a symbol in applyFixup rather than retrieve and set it in MipsMCCodeEmitter::getMachineOpValue. Assert in getMachineOpValue if MachineOperand MO is of an unexpected type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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bca9c25dabbf50923319339ae780d6f916f56bfb |
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27-Mar-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Rewrite computation of Value in adjustFixupValue so that the upper 48-bits are cleared. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153491 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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f1d0f7781e766df878bec4e7977fa3204374f394 |
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26-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Prune some includes and forward declarations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153429 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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9be7c94ccd175c023c10ce3936a6dd374c7a952f |
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21-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Add typecast to silence -Wswitch warning introduced by r153153. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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fb54afbcb8f460c5c4cafa605259ba0dd77504dc |
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21-Mar-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Incremental big endian patch by Jack Carter. These changes allow us to compile big endian from the command line for 32 bit Mips targets. This patch will result in code and data actually being produced in the correct endianess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153153 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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e9e520f23ec3e5dc26e0801ac0d8b9e6899e2626 |
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01-Mar-2012 |
Akira Hatanaka <ahatanaka@mips.com> |
Pass endian information to constructors. Define separate functions to create objects for big endian and little endian targets. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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bb481f882093fb738d2bb15610c79364bada5496 |
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28-Feb-2012 |
Jia Liu <proljc@gmail.com> |
remove blanks, and some code format git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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c5707112e7635d1dd2f2cc9c4f42e79a51302cca |
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17-Feb-2012 |
Jia Liu <proljc@gmail.com> |
remove Emacs-tag form .cpp files in Mips Backend, and fix some typo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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8f5e8c1cd69fa77bea20140a7132ee2dea166c6d |
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17-Feb-2012 |
Jia Liu <proljc@gmail.com> |
add Emacs tag and fix some comment error in file headers git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150775 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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ec3433852dd11e8ff60c9610b4c84468e5935f2b |
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18-Jan-2012 |
Jim Grosbach <grosbach@apple.com> |
Tidy up. MCAsmBackend naming conventions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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29a17145ad4985df032785cc1b4716fd7875d47b |
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11-Jan-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add big endian mips support. Based on a patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147924 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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090445967f0b5988446faffefd1d0722f982bc7a |
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22-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Move the Mips only bits of the ELF writer to lib/Target/Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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bc24985c5ff01fc25336896c388bd8e4e02ffd95 |
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22-Dec-2011 |
Akira Hatanaka <ahatanaka@mips.com> |
Local dynamic TLS model for direct object output. Create the correct TLS MIPS ELF relocations. Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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dc9a8a378daf432d8dcfc178507afe149706f9a6 |
|
21-Dec-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Reduce the exposure of Triple::OSType in the ELF object writer. This will avoid including ADT/Triple.h in many places when the target specific bits are moved. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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e3d3572e282733bd7aa5ac14115ed0804174e426 |
|
07-Dec-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add a few moreLocal/Global R_MIPS_GOT related fixups and make the addend fixup code a bit more generic Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145998 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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6482e9114954def43fc08e83aadec1aadfc64200 |
|
06-Dec-2011 |
NAKAMURA Takumi <geek4civic@gmail.com> |
MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145894 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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370b78d795154899a22ca2b4674e890661ff1d59 |
|
06-Dec-2011 |
Jim Grosbach <grosbach@apple.com> |
Move target-specific logic out of generic MCAssembler. Whether a fixup needs relaxation for the associated instruction is a target-specific function, as the FIXME indicated. Create a hook for that and use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
|
84bfc2f090639f933df06cc675c4385511516bef |
|
23-Nov-2011 |
Akira Hatanaka <ahatanaka@mips.com> |
This patch addresses gp relative fixups/relocations for jump tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145112 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
|
47b92f3d8362518596d57269dc53d985bc13323a |
|
11-Nov-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Mips MC object code emission improvements: "With this patch we can now generate runnable Mips code through LLVM direct object emission. We have run numerous simple programs, both C and C++ and with -O0 and -O3 from the output. The code is not production ready, but quite useful for experimentation." Patch and message by Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144414 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
|
4b6ee7a35213709c057cdd073fb27bda09fa3359 |
|
30-Sep-2011 |
Akira Hatanaka <ahatanaka@mips.com> |
Register Asm backend. Add functions to MipsAsmBackend. Patch by Reed Kotler at Mips Technologies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
|
82ea7314ca52c9df8e1b6600231fafb7ae722313 |
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30-Sep-2011 |
Akira Hatanaka <ahatanaka@mips.com> |
Add MCELFObjectTargetWriter and MCAsmBackend classes. Patch by Reed Kotler at Mips Technologies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
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