| de2d8694e25a814696358e95141f4b1aa4d8847e |
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20-Sep-2016 |
Pirama Arumuga Nainar <pirama@google.com> |
Update aosp/master LLVM for rebase to r275480
Bug: http://b/31320715
This merges commit 7dcf7f03e005379ef2f06db96aa93f06186b66d5 from
aosp/dev.
Test: Build AOSP and run RenderScript tests (host tests for slang and
libbcc, RsTest, CTS)
Change-Id: Iaf3738f74312d875e69f61d604ac058f381a2a1a
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| ebe69fe11e48d322045d5949c83283927a0d790b |
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23-Mar-2015 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r230699.
Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 37ed9c199ca639565f6ce88105f9e39e898d82d0 |
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01-Dec-2014 |
Stephen Hines <srhines@google.com> |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
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24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 633f98bdfa266871dcd17ab27af1594c6cc31d9e |
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03-Nov-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
AVX-512: added VPCONFLICT instruction and intrinsics,
added EVEX_KZ to tablegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| c18f4efc5dd24adcc653806455fc7ae8508e9c66 |
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28-Jul-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Added encoding prefixes for KNL instructions (EVEX).
Added 512-bit operands printing.
Added instruction formats for KNL instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 4ffd89fa4d2788611187d1a534d2ed46adf1702c |
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04-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort the #include lines for utils/...
I've tried to find main moudle headers where possible, but the TableGen
stuff may warrant someone else looking at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 8a312fb3aaec90537d434a5cc41edf566ff80dca |
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19-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 2d9eb72178af8e79dc6432cd1b7d29bde16da1b9 |
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13-Sep-2012 |
Dmitri Gribenko <gribozavr@gmail.com> |
Fix Doxygen issues:
* wrap code blocks in \code ... \endcode;
* refer to parameter names in paragraphs correctly (\arg is not what most
people want -- it starts a new paragraph).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| a00b80b04c5edb08639c1c6b32e9231fd8b066f7 |
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23-Aug-2012 |
Dmitri Gribenko <gribozavr@gmail.com> |
Fix a bunch of -Wdocumentation warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 5aba78bd8056dc407bcbce4080ffcd12b13c7342 |
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12-Jul-2012 |
Craig Topper <craig.topper@gmail.com> |
Update GATHER instructions to support 2 read-write operands. Patch from myself and Manman Ren.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 930a1ebd929aa0ab4c2610e7f7a721c18dcfe052 |
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27-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151510 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| e6a3a2990e3f783c906e9db58e55439cb06f9fa5 |
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30-Dec-2011 |
Craig Topper <craig.topper@gmail.com> |
Add FMA4 instructions to disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961 |
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16-Oct-2011 |
Craig Topper <craig.topper@gmail.com> |
Add X86 BZHI instruction as well as BMI2 feature detection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 17730847d59c919d97f097d46a3fcba1888e5300 |
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16-Oct-2011 |
Craig Topper <craig.topper@gmail.com> |
Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142105 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 6744a17dcfb941d9fdd869b9f06e20660e18ff88 |
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04-Oct-2011 |
Craig Topper <craig.topper@gmail.com> |
Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 7c788888872233748da10a8177a9a1eb176c1bc8 |
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01-Oct-2011 |
Peter Collingbourne <peter@pcc.me.uk> |
Move TableGen's parser and entry point into a library
This is the first step towards splitting LLVM and Clang's tblgen executables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 4da632e6e09b96db4b3f9202cde4e6ca732001c1 |
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23-Sep-2011 |
Craig Topper <craig.topper@gmail.com> |
Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140370 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 7105259ce8e9fd78ce9fc1b7a9aaab123fb5db64 |
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16-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the disassembler able to disassemble a bunch of instructions with names in the TableGen files containing "64" on x86-32. This includes a bunch of x87 instructions, like fld, and a bunch of SSSE3 instructions on MMX registers like pshufb. Part of PR8873.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| a21e2eae3def2fe39caed861dcb73c76c715569b |
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15-Mar-2011 |
Sean Callanan <scallanan@apple.com> |
X86 table-generator and disassembler support for the AVX
instruction set. This code adds support for the VEX prefix
and for the YMM registers accessible on AVX-enabled
architectures. Instruction table support that enables AVX
instructions for the disassembler is in an upcoming patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 3cc52ea33c0b96d1682f14fc45c45b57df0f39b6 |
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29-Nov-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
I swear I did a make clean and make before committing all this...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| c240bb0ede0541426254d0e0dc81d891beda4b22 |
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01-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
factor the operand list (and related fields/operations) out of
CodeGenInstruction into its own helper class. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 99405df044f2c584242e711cc9023ec90356da82 |
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09-Jun-2010 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Reapply r105521, this time appending "LLU" to 64 bit
immediates to avoid breaking the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105652 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 1087f54ddb70bd2a7ab62608161e4a3f0c345935 |
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05-Jun-2010 |
Chris Lattner <sabre@nondot.org> |
revert r105521, which is breaking the buildbots with stuff like this:
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 3eca98bb3ab1ec27ab8763298c416d282cdaa261 |
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05-Jun-2010 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Initial AVX support for some instructions. No patterns matched
yet, only assembly encoding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
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| 8ed9f51663bc5533f36ca62e5668ae08e9a1313f |
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19-Dec-2009 |
Sean Callanan <scallanan@apple.com> |
Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
incarnations), integrated into the MC framework.
The disassembler is table-driven, using a custom TableGen backend to
generate hierarchical tables optimized for fast decode. The disassembler
consumes MemoryObjects and produces arrays of MCInsts, adhering to the
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).
The disassembler is documented in detail in
- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)
You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets. Please let me know if you encounter any problems
with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/X86RecognizableInstr.h
|