Searched defs:RegisterVT (Results 1 - 10 of 10) sorted by relevance
/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyAsmPrinter.cpp | 138 MVT RegisterVT = TLI.getRegisterType(F.getContext(), VT); local 140 ValueVTs.push_back(RegisterVT);
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | FunctionLoweringInfo.cpp | 385 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT); local 389 unsigned R = CreateReg(RegisterVT);
|
H A D | SelectionDAGBuilder.cpp | 287 MVT RegisterVT; local 291 NumIntermediates, RegisterVT); 294 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!"); 295 assert(RegisterVT.getSizeInBits() == 573 MVT RegisterVT; local 577 NumIntermediates, RegisterVT); 582 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!"); 628 MVT RegisterVT = TLI.getRegisterType(Context, ValueVT); local 631 RegVTs.push_back(RegisterVT); 657 MVT RegisterVT local 758 MVT RegisterVT = RegVTs[Value]; local 828 MVT RegisterVT = RegVTs[Value]; local [all...] |
H A D | FastISel.cpp | 927 MVT RegisterVT = TLI.getRegisterType(CLI.RetTy->getContext(), VT); local 931 MyFlags.VT = RegisterVT;
|
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | FunctionLoweringInfo.cpp | 226 EVT RegisterVT = TLI.getRegisterType(Ty->getContext(), ValueVT); local 230 unsigned R = CreateReg(RegisterVT);
|
H A D | TargetLowering.cpp | 656 EVT &RegisterVT, 692 RegisterVT = DestVT; 880 EVT RegisterVT; local 884 RegisterVT, this); 885 RegisterTypeForVT[i] = RegisterVT; 940 EVT &RegisterVT) const { 947 RegisterVT = getTypeToTransformTo(Context, VT); 948 if (isTypeLegal(RegisterVT)) { 949 IntermediateVT = RegisterVT; 983 RegisterVT 654 getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, unsigned &NumIntermediates, EVT &RegisterVT, TargetLowering *TLI) argument [all...] |
H A D | SelectionDAGBuilder.cpp | 227 EVT IntermediateVT, RegisterVT; local 231 NumIntermediates, RegisterVT); 234 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!"); 235 assert(RegisterVT == Parts[0].getValueType() && 498 EVT IntermediateVT, RegisterVT; local 502 NumIntermediates, RegisterVT); 507 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!"); 587 EVT RegisterVT = tli.getRegisterType(Context, ValueVT); local 590 RegVTs.push_back(RegisterVT); 598 EVT RegisterVT local 658 EVT RegisterVT = RegVTs[Value]; local 742 EVT RegisterVT = RegVTs[Value]; local 808 EVT RegisterVT = RegVTs[Value]; local 5286 EVT RegisterVT = TLI.getRegisterType(RetTy->getContext(), VT); local 6410 EVT RegisterVT = getRegisterType(RetTy->getContext(), VT); local 6465 EVT RegisterVT = getRegisterType(RetTy->getContext(), VT); local 6556 EVT RegisterVT = TLI.getRegisterType(*DAG.getContext(), ValueVTs[0]); local 6602 EVT RegisterVT = TLI.getRegisterType(*CurDAG->getContext(), VT); local [all...] |
/external/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 1117 MVT &RegisterVT, 1153 RegisterVT = DestVT; 1438 MVT RegisterVT; local 1441 NumIntermediates, RegisterVT, this); 1442 RegisterTypeForVT[i] = RegisterVT; 1503 MVT &RegisterVT) const { 1516 RegisterVT = RegisterEVT.getSimpleVT(); 1550 RegisterVT = DestVT; 1115 getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT, TargetLoweringBase *TLI) argument
|
/external/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 538 MVT &RegisterVT) const; 842 MVT RegisterVT; local 845 NumIntermediates, RegisterVT); 846 return RegisterVT;
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86FastISel.cpp | 1849 EVT RegisterVT = TLI.getRegisterType(I->getParent()->getContext(), VT); local 1853 MyFlags.VT = RegisterVT.getSimpleVT();
|
Completed in 112 milliseconds