Searched defs:ST (Results 151 - 175 of 193) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/VMCore/
H A DVerifier.cpp1738 StructType *ST = dyn_cast<StructType>(RetTy); local
1742 else if (ST)
1743 NumRetVals = ST->getNumElements();
1776 if (ST)
1777 RetTy = ST->getElementType(Match);
1907 StructType *ST = dyn_cast<StructType>(Ty); local
1915 if (ST && ST->getNumElements() != NumRetVals) {
1923 if (ST) Ty = ST
[all...]
/external/clang/lib/StaticAnalyzer/Core/
H A DRegionStore.cpp464 /// \param ST the original store, that is the basis for the new store.
466 StoreRef killBinding(Store ST, Loc L) override;
1975 StoreRef RegionStoreManager::killBinding(Store ST, Loc L) { argument
1978 return StoreRef(getRegionBindings(ST).removeBinding(R)
1983 return StoreRef(ST, *this);
/external/clang/utils/TableGen/
H A DNeonEmitter.cpp1585 void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
1588 ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts2, Loc);
1594 void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
1597 ST.evaluate(Expr->arg_begin(), Expr->arg_end(), Elts2, Loc);
1606 void apply(SetTheory &ST, DagInit *Expr, SetTheory::RecSet &Elts,
1609 ST.evaluate(Expr->arg_begin() + 1, Expr->arg_end(), Elts2, Loc);
1629 void expand(SetTheory &ST, Record *R, SetTheory::RecSet &Elts) override {
1650 SetTheory ST; local
1652 ST.addOperator("lowhalf", llvm::make_unique<LowHalf>());
1653 ST
[all...]
/external/llvm/lib/Bitcode/Writer/
H A DBitcodeWriter.cpp857 StructType *ST = cast<StructType>(T); local
859 TypeVals.push_back(ST->isPacked());
861 for (StructType::element_iterator I = ST->element_begin(),
862 E = ST->element_end(); I != E; ++I)
865 if (ST->isLiteral()) {
869 if (ST->isOpaque()) {
877 if (!ST->getName().empty())
878 writeStringRecord(bitc::TYPE_CODE_STRUCT_NAME, ST->getName(),
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGISel.cpp300 const TargetSubtargetInfo &ST = IS->MF->getSubtarget(); local
303 if (auto *SchedulerCtor = ST.getDAGScheduler(OptLevel)) {
308 (ST.enableMachineScheduler() && ST.enableMachineSchedDefaultSched()) ||
H A DLegalizeVectorTypes.cpp3284 StoreSDNode *ST = cast<StoreSDNode>(N); local
3287 if (ST->isTruncatingStore())
3288 GenWidenVectorTruncStores(StChain, ST);
3290 GenWidenVectorStores(StChain, ST);
3295 return DAG.getNode(ISD::TokenFactor, SDLoc(ST), MVT::Other, StChain);
3698 StoreSDNode *ST) {
3702 SDValue Chain = ST->getChain();
3703 SDValue BasePtr = ST->getBasePtr();
3704 unsigned Align = ST->getAlignment();
3705 bool isVolatile = ST
3697 GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST) argument
3772 GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST) argument
[all...]
H A DTargetLowering.cpp3192 SDValue TargetLowering::scalarizeVectorStore(StoreSDNode *ST, argument
3194 SDLoc SL(ST);
3196 SDValue Chain = ST->getChain();
3197 SDValue BasePtr = ST->getBasePtr();
3198 SDValue Value = ST->getValue();
3199 EVT StVT = ST->getMemoryVT();
3201 unsigned Alignment = ST->getAlignment();
3202 bool isVolatile = ST->isVolatile();
3203 bool isNonTemporal = ST->isNonTemporal();
3204 AAMDNodes AAInfo = ST
3400 expandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG) const argument
[all...]
H A DSelectionDAG.cpp457 const StoreSDNode *ST = cast<StoreSDNode>(N); local
458 ID.AddInteger(ST->getMemoryVT().getRawBits());
459 ID.AddInteger(ST->getRawSubclassData());
460 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5308 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); local
5309 assert(ST->getOffset().isUndef() && "Store is already a indexed store!");
5311 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5314 ID.AddInteger(ST->getMemoryVT().getRawBits());
5315 ID.AddInteger(ST
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/external/llvm/lib/IR/
H A DConstants.cpp878 if (auto *ST = dyn_cast<StructType>(T))
879 if (ST->isOpaque())
953 Constant *ConstantStruct::get(StructType *ST, ArrayRef<Constant*> V) { argument
954 assert((ST->isOpaque() || ST->getNumElements() == V.size()) &&
974 return ConstantAggregateZero::get(ST);
976 return UndefValue::get(ST);
978 return ST->getContext().pImpl->StructConstants.getOrCreate(ST, V);
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp2153 StoreSDNode *ST = cast<StoreSDNode>(N); local
2156 if (ST->isTruncatingStore())
2157 GenWidenVectorTruncStores(StChain, ST);
2159 GenWidenVectorStores(StChain, ST);
2164 return DAG.getNode(ISD::TokenFactor, ST->getDebugLoc(),
2445 StoreSDNode *ST) {
2449 SDValue Chain = ST->getChain();
2450 SDValue BasePtr = ST->getBasePtr();
2451 unsigned Align = ST->getAlignment();
2452 bool isVolatile = ST
2444 GenWidenVectorStores(SmallVector<SDValue, 16>& StChain, StoreSDNode *ST) argument
2513 GenWidenVectorTruncStores(SmallVector<SDValue, 16>& StChain, StoreSDNode *ST) argument
[all...]
H A DDAGCombiner.cpp5884 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
5885 if (ST->isIndexed())
5887 VT = ST->getMemoryVT();
5891 Ptr = ST->getBasePtr();
6016 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
6017 if (ST->isIndexed())
6019 VT = ST->getMemoryVT();
6023 Ptr = ST->getBasePtr();
6393 StoreSDNode *ST = cast<StoreSDNode>(N); local
6394 if (ST
6516 StoreSDNode *ST = cast<StoreSDNode>(N); local
6569 StoreSDNode *ST = cast<StoreSDNode>(N); local
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/CBackend/
H A DCBackend.cpp168 std::string getStructName(StructType *ST);
365 std::string CWriter::getStructName(StructType *ST) { argument
366 if (!ST->isLiteral() && !ST->getName().empty())
367 return CBEMangle("l_"+ST->getName().str());
369 return "l_unnamed_" + utostr(UnnamedStructIDs[ST]);
1079 StructType *ST = cast<StructType>(CPV->getType()); local
1081 if (ST->getNumElements()) {
1083 printConstant(Constant::getNullValue(ST->getElementType(0)), Static);
1084 for (unsigned i = 1, e = ST
2053 StructType *ST = StructTypes[i]; local
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
H A DSPUISelLowering.cpp549 LowerLOAD(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { argument
757 LowerSTORE(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { argument
997 LowerConstantPool(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { argument
1008 if (!ST->usingLargeMem()) {
1030 LowerJumpTable(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { argument
1040 if (!ST->usingLargeMem()) {
1055 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG, const SPUSubtarget *ST) { argument
1067 if (!ST->usingLargeMem()) {
1269 const SPUSubtarget *ST = SPUTM.getSubtargetImpl(); local
1372 if (!ST
2902 const SPUSubtarget *ST = SPUTM.getSubtargetImpl(); local
[all...]
/external/v8/src/arm/
H A Dconstants-arm.h233 ST = 0xe, enumerator in enum:v8::internal::BarrierOption
/external/clang/include/clang/AST/
H A DASTContext.h1383 void setObjCSuperType(QualType ST) { ObjCSuperType = ST; } argument
/external/clang/lib/CodeGen/
H A DCGStmtOpenMP.cpp1673 Address LB, Address UB, Address ST, Address IL, llvm::Value *Chunk) {
1697 LB, UB, ST);
1765 Address LB, Address UB, Address ST, Address IL, llvm::Value *Chunk) {
1822 // LB = LB + ST;
1823 // UB = UB + ST;
1837 Ordered, IL, LB, UB, ST, Chunk);
1841 ST, IL, Chunk);
1847 Address LB, Address UB, Address ST, Address IL, llvm::Value *Chunk) {
1862 IL, LB, UB, ST, Chunk);
1865 S, LoopScope, /* Ordered = */ false, LB, UB, ST, I
1671 EmitOMPOuterLoop(bool DynamicOrOrdered, bool IsMonotonic, const OMPLoopDirective &S, OMPPrivateScope &LoopScope, bool Ordered, Address LB, Address UB, Address ST, Address IL, llvm::Value *Chunk) argument
1762 EmitOMPForOuterLoop( const OpenMPScheduleTy &ScheduleKind, bool IsMonotonic, const OMPLoopDirective &S, OMPPrivateScope &LoopScope, bool Ordered, Address LB, Address UB, Address ST, Address IL, llvm::Value *Chunk) argument
1844 EmitOMPDistributeOuterLoop( OpenMPDistScheduleClauseKind ScheduleKind, const OMPDistributeDirective &S, OMPPrivateScope &LoopScope, Address LB, Address UB, Address ST, Address IL, llvm::Value *Chunk) argument
1990 LValue ST = local
2664 LValue ST = local
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/external/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp597 const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); local
609 if (ST.debuggerEmitPrologue())
866 if (ST.isAmdHsaOS()) {
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp932 } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
933 VT = ST->getMemoryVT();
934 if (ST->getValue().getValueType() == MVT::i64 && ST->isTruncatingStore()) {
1702 const HexagonSubtarget &ST)
1704 Subtarget(ST) {
2543 MVT ST = VecVT.getSimpleVT(); local
2546 if (ST == MVT::v2i16 || ST == MVT::v4i8)
1701 HexagonTargetLowering(const TargetMachine &TM, const HexagonSubtarget &ST) argument
H A DHexagonInstrInfo.cpp103 HexagonInstrInfo::HexagonInstrInfo(HexagonSubtarget &ST) argument
3048 // Returns true, if a ST insn can be promoted to a new-value store.
4181 const TargetSubtargetInfo &ST = MI->getParent()->getParent()->getSubtarget(); local
4182 const InstrItineraryData &II = *ST.getInstrItineraryData();
/external/spirv-llvm/lib/SPIRV/libSPIRV/
H A DSPIRVModule.cpp160 virtual SPIRVMemberName *addMemberName(SPIRVTypeStruct *ST,
789 auto ST = static_cast<SPIRVTypeStruct *>(T); local
791 for (unsigned i = 0; i < ST->getStructMemberCount(); ++i) {
792 auto MemberTy = ST->getStructMemberType(i);
1394 SPIRVModuleImpl::addMemberName(SPIRVTypeStruct* ST, argument
1396 return add(new SPIRVMemberName(ST, MemberNumber, Name));
/external/llvm/bindings/ocaml/llvm/
H A Dllvm_ocaml.c2057 value ST, value Name, value B) {
2060 Ptr, Val, Int_val(Ord), Bool_val(ST));
2055 llvm_build_atomicrmw_native(value BinOp, LLVMValueRef Ptr, LLVMValueRef Val, value Ord, value ST, value Name, value B) argument
/external/llvm/include/llvm/Support/
H A DMachO.h1404 static inline int CPU_SUBTYPE_INTEL_FAMILY(CPUSubTypeX86 ST) { argument
1405 return ((int)ST) & 0x0f;
1407 static inline int CPU_SUBTYPE_INTEL_MODEL(CPUSubTypeX86 ST) { argument
1408 return ((int)ST) >> 4;
/external/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp4903 StoreInst *ST = cast<StoreInst>(CombineInst); local
4904 unsigned AS = ST->getPointerAddressSpace();
4905 unsigned Align = ST->getAlignment();
4908 TLI.getValueType(DL, ST->getValueOperand()->getType()), AS,
H A DMachinePipeliner.cpp555 const TargetSubtargetInfo &ST; member in class:__anon12702::SMSchedule
564 : ST(mf->getSubtarget()), MRI(mf->getRegInfo()),
565 Resources(ST.getInstrInfo()->CreateTargetScheduleState(ST)) {
1077 const TargetSubtargetInfo &ST = MF.getSubtarget<TargetSubtargetInfo>(); local
1124 ST.adjustSchedDependency(SU, &I, Dep);
3475 if (ST.getInstrInfo()->isZeroCost((*I)->getInstr()->getOpcode()))
3482 if (ST.getInstrInfo()->isZeroCost(SU->getInstr()->getOpcode()) ||
3647 if (ST.getInstrInfo()->getBaseAndOffsetPosition(MI, BasePos, OffsetPos))
3822 const TargetRegisterInfo *TRI = ST
[all...]
/external/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp1463 auto *ST = dyn_cast<StructType>(T); local
1464 if (ST) {
1465 N = ST->getNumElements();
1466 EltTy = *ST->element_begin();
1476 if (ST) {
1478 for (const auto *Ty : ST->elements())

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