Searched refs:OP_SUSTP (Results 1 - 11 of 11) sorted by relevance

/external/mesa3d/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_target_gm107.cpp201 case OP_SUSTP:
289 case OP_SUSTP:
H A Dnv50_ir_target_nvc0.cpp149 { OP_SUSTP, 0x0, 0x0, 0x0, 0x0, 0x2, 0x0 },
177 OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
H A Dnv50_ir_emit_gk110.cpp1656 assert(i->op == OP_SUSTP);
1664 if (i->op == OP_SUSTP)
1678 if (i->op == OP_SUSTP)
2607 case OP_SUSTP:
H A Dnv50_ir_target_nv50.cpp130 OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
H A Dnv50_ir_lowering_nvc0.cpp1871 if (su->op != OP_SUSTP && su->tex.format) {
2040 if (su->op == OP_SUSTB || su->op == OP_SUSTP)
2091 if (su->op != OP_SUSTP && su->tex.format) {
2173 case OP_SUSTP:
2190 if (su->op != OP_SUSTP && su->tex.format) {
2724 case OP_SUSTP:
H A Dnv50_ir.h129 OP_SUSTP, // surface store (formatted) enumerator in enum:nv50_ir::operation
H A Dnv50_ir_emit_nvc0.cpp2335 if (i->op == OP_SUSTP)
2430 if (i->op == OP_SUSTP)
2751 case OP_SUSTP:
H A Dnv50_ir_ra.cpp2107 case OP_SUSTP:
2154 if (tex->op == OP_SUSTB || tex->op == OP_SUSTP) {
2183 if (tex->op == OP_SUSTB || tex->op == OP_SUSTP)
H A Dnv50_ir_emit_gm107.cpp3339 case OP_SUSTP:
H A Dnv50_ir_peephole.cpp69 op == OP_SUSTB || op == OP_SUSTP || op == OP_SUREDP || op == OP_SUREDB ||
H A Dnv50_ir_from_tgsi.cpp2621 // For formatted stores, the write mask on OP_SUSTP can be used.
2665 mkTex(OP_SUSTP, getImageTarget(code, r), code->images[r].slot,
2723 mkTex(OP_SUSTP, getResourceTarget(code, r), code->resources[r].slot, 0,

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