Searched refs:R28 (Results 1 - 18 of 18) sorted by relevance
| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiBaseInfo.h | 106 case Lanai::R28:
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCBaseInfo.h | 59 case R28: case X28: case F28: case V28: case CR7LT: return 28;
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| /external/llvm/lib/Target/AVR/ |
| H A D | AVRRegisterInfo.cpp | 70 Reserved.set(AVR::R28);
241 return AVR::R28;
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| H A D | AlphaRegisterInfo.cpp | 162 DEBUG(errs() << "Unconditionally using R28 for evil purposes Offset: "
167 MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false);
171 TII.get(Alpha::LDAH), Alpha::R28)
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/ |
| H A D | MBlazeBaseInfo.h | 133 case MBlaze::R28 : return 28;
198 case 28 : return MBlaze::R28;
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.h | 157 {PPC::R28, -16},
236 {PPC::R28, -28},
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| H A D | PPCRegisterInfo.cpp | 110 PPC::R28, PPC::R29, PPC::R30, PPC::R31,
136 PPC::R28, PPC::R29, PPC::R30, PPC::R31,
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| H A D | MBlazeRegisterInfo.cpp | 63 MBlaze::R28, MBlaze::R29, MBlaze::R30, MBlaze::R31,
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| /external/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 160 Lanai::R24, Lanai::R25, Lanai::R26, Lanai::R27, Lanai::R28, Lanai::R29,
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| H A D | SPURegisterInfo.cpp | 82 case SPU::R28: return 28;
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| H A D | SPUISelLowering.cpp | 1205 SPU::R24, SPU::R25, SPU::R26, SPU::R27, SPU::R28, SPU::R29, SPU::R30,
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| /external/syslinux/gpxe/src/include/gpxe/efi/Protocol/ |
| H A D | DebugSupport.h | 317 UINT64 R28; member in struct:__anon22175
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 171 PPC::R28, PPC::R29, PPC::R30, PPC::R31
182 PPC::R28, PPC::R29, PPC::R30, PPC::R31
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 42 PPC::R28, PPC::R29, PPC::R30, PPC::R31
53 PPC::R28, PPC::R29, PPC::R30, PPC::R31
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| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 498 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 604 .addReg(Hexagon::R28);
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| H A D | HexagonISelLowering.cpp | 2744 unsigned OffsetReg = Hexagon::R28;
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFrameLowering.cpp | 139 {PPC::R28, -16},
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