Searched refs:SPAdj (Results 1 - 25 of 79) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
H A DPPCRegisterInfo.h54 int SPAdj, RegScavenger *RS) const;
56 int SPAdj, RegScavenger *RS) const;
58 int SPAdj, RegScavenger *RS = NULL) const;
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
H A DPTXRegisterInfo.cpp35 int SPAdj,
57 DEBUG(dbgs() << "- SPAdj: " << SPAdj << "\n");
34 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, RegScavenger *RS) const argument
H A DPTXRegisterInfo.h47 int SPAdj,
/external/llvm/lib/Target/BPF/
H A DBPFRegisterInfo.h32 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
/external/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.h37 int SPAdj, unsigned FIOperandNum,
/external/llvm/include/llvm/Target/
H A DTargetFrameLowering.h76 int alignSPAdjust(int SPAdj) const {
77 if (SPAdj < 0) {
78 SPAdj = -alignTo(-SPAdj, StackAlignment);
80 SPAdj = alignTo(SPAdj, StackAlignment);
82 return SPAdj;
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DRegisterScavenging.h115 /// available and do the appropriate bookkeeping. SPAdj is the stack
119 MachineBasicBlock::iterator I, int SPAdj);
120 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) { argument
121 return scavengeRegister(RegClass, MBBI, SPAdj);
/external/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.h47 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
/external/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.h39 int SPAdj, unsigned FIOperandNum,
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegisterInfo.h38 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
/external/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.h43 int SPAdj, unsigned FIOperandNum,
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
H A DAlphaRegisterInfo.h42 int SPAdj, RegScavenger *RS = NULL) const;
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
H A DSparcRegisterInfo.h44 int SPAdj, RegScavenger *RS = NULL) const;
/external/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.cpp92 int SPAdj, unsigned FIOperandNum,
94 assert(SPAdj == 0 && "Unexpected");
91 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const argument
H A DNVPTXRegisterInfo.h42 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
H A DSPURegisterInfo.h74 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
96 int SPAdj) const;
/external/llvm/include/llvm/CodeGen/
H A DRegisterScavenging.h140 /// available and do the appropriate bookkeeping. SPAdj is the stack
144 MachineBasicBlock::iterator I, int SPAdj);
145 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) { argument
146 return scavengeRegister(RegClass, MBBI, SPAdj);
/external/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.h41 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
/external/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.h36 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
/external/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.h43 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
/external/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.h60 int SPAdj, unsigned FIOperandNum,
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
H A DBlackfinRegisterInfo.h53 int SPAdj, RegScavenger *RS = NULL) const;
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
H A DMBlazeRegisterInfo.h59 int SPAdj, RegScavenger *RS = NULL) const;
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
H A DMSP430RegisterInfo.h56 int SPAdj, RegScavenger *RS = NULL) const;
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
H A DMipsRegisterInfo.h55 int SPAdj, RegScavenger *RS = NULL) const;

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