Searched refs:SubRegNo (Results 1 - 5 of 5) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
H A D | X86GenRegisterInfo.inc | 2430 unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
4282 unsigned X86GenRegisterInfo::getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {
4287 if (SubRegNo == X86::AL) return X86::sub_8bit;
4288 if (SubRegNo == X86::AH) return X86::sub_8bit_hi;
4291 if (SubRegNo == X86::BPL) return X86::sub_8bit;
4294 if (SubRegNo == X86::BL) return X86::sub_8bit;
4295 if (SubRegNo == X86::BH) return X86::sub_8bit_hi;
4298 if (SubRegNo == X86::CL) return X86::sub_8bit;
4299 if (SubRegNo == X86::CH) return X86::sub_8bit_hi;
4302 if (SubRegNo [all...] |
/external/swiftshader/third_party/LLVM/utils/TableGen/ |
H A D | FastISelEmitter.cpp | 37 std::string SubRegNo; member in struct:__anon20424::InstructionMemo 456 std::string SubRegNo; 473 SubRegNo = getQualifiedName(SR->getDef()); 475 SubRegNo = Dst->getChild(1)->getLeafValue()->getAsString(); 543 SubRegNo, 639 if (Memo.SubRegNo.empty()) { 650 OS << ", Op0, Op0IsKill, " << Memo.SubRegNo << ");\n"; 731 if (Memo.SubRegNo.empty()) { 742 OS << Memo.SubRegNo;
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/external/llvm/utils/TableGen/ |
H A D | FastISelEmitter.cpp | 38 std::string SubRegNo; member in struct:__anon13888::InstructionMemo 480 std::string SubRegNo; 497 SubRegNo = getQualifiedName(SR->getDef()); 499 SubRegNo = Dst->getChild(1)->getLeafValue()->getAsString(); 579 SubRegNo, 663 if (Memo.SubRegNo.empty()) { 674 << ", Op0, Op0IsKill, " << Memo.SubRegNo << ");\n";
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
H A D | TargetRegisterInfo.h | 378 virtual unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const = 0;
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/external/llvm/include/llvm/MC/ |
H A D | MCRegisterInfo.h | 353 unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
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