Searched refs:src_res (Results 1 - 10 of 10) sorted by relevance

/external/mesa3d/src/gallium/state_trackers/clover/core/
H A Dresource.cpp59 resource &src_res, const vector &src_origin) {
63 src_res.pipe, 0,
64 box(src_res.offset + src_origin, region));
58 copy(command_queue &q, const vector &origin, const vector &region, resource &src_res, const vector &src_origin) argument
/external/mesa3d/src/mesa/state_tracker/
H A Dst_cb_copyimage.c542 struct pipe_resource *src_res,
593 src = pipe_transfer_map(st->pipe, src_res, 0, src_z,
631 struct pipe_resource *src_res, *dst_res; local
641 src_res = src->pt;
650 src_res = src->texture;
674 src_image, src_res, src_x, src_y, orig_src_z,
678 src_res, src_level, &box);
537 fallback_copy_image(struct st_context *st, struct gl_texture_image *dst_image, struct pipe_resource *dst_res, int dst_x, int dst_y, int dst_z, struct gl_texture_image *src_image, struct pipe_resource *src_res, int src_x, int src_y, int src_z, int src_w, int src_h) argument
/external/mesa3d/src/gallium/drivers/virgl/
H A Dvirgl_encode.h214 struct virgl_resource *src_res,
220 struct virgl_resource *src_res,
H A Dvirgl_encode.c723 struct virgl_resource *src_res,
733 virgl_encoder_write_res(ctx, src_res);
746 struct virgl_resource *src_res,
770 virgl_encoder_write_res(ctx, src_res);
719 virgl_encode_resource_copy_region(struct virgl_context *ctx, struct virgl_resource *dst_res, unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz, struct virgl_resource *src_res, unsigned src_level, const struct pipe_box *src_box) argument
744 virgl_encode_blit(struct virgl_context *ctx, struct virgl_resource *dst_res, struct virgl_resource *src_res, const struct pipe_blit_info *blit) argument
/external/mesa3d/src/gallium/state_trackers/nine/
H A Dbuffer9.c297 struct pipe_resource *src_res; local
305 src_res = nine_upload_buffer_resource_and_offset(This->buf, &offset);
310 src_res, 0, &src_box);
H A Dnine_state.h527 struct pipe_resource* src_res,
H A Ddevice9.c1581 struct pipe_resource *src_res = NineSurface9_GetResource(src); local
1614 user_assert(zs || !util_format_is_depth_or_stencil(src_res->format),
1618 user_assert(screen->is_format_supported(screen, src_res->format,
1619 src_res->target,
1620 src_res->nr_samples,
1661 blit.src.resource = src_res;
1665 blit.src.format = src_res->format;
H A Dnine_state.c2661 ARG_BIND_RES(struct pipe_resource, src_res),
2673 src_res, src_level,
/external/mesa3d/src/amd/vulkan/
H A Dradv_meta_blit.c511 const VkImageSubresourceLayers *src_res = &pRegions[r].srcSubresource; local
521 .aspectMask = src_res->aspectMask,
522 .baseMipLevel = src_res->mipLevel,
524 .baseArrayLayer = src_res->baseArrayLayer,
542 assert(src_res->baseArrayLayer == 0);
546 src_start = src_res->baseArrayLayer;
547 src_end = src_start + src_res->layerCount;
/external/mesa3d/src/intel/vulkan/
H A Danv_blorp.c445 const VkImageSubresourceLayers *src_res = &pRegions[r].srcSubresource; local
448 get_blorp_surf_for_anv_image(src_image, src_res->aspectMask,
455 src_res->aspectMask, src_image->tiling);
472 assert(src_res->baseArrayLayer == 0);
476 src_start = src_res->baseArrayLayer;
477 src_end = src_start + anv_get_layerCount(src_image, src_res);
506 blorp_blit(&batch, &src, src_res->mipLevel, src_z,

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