| 12010b92263dd63a6cef785c730ff877f7912cc8 |
|
10-Jun-2016 |
Topi Pohjolainen <topi.pohjolainen@intel.com> |
i965: Add new interface for full color resolves
Upcoming patches will introduce fast clear in level/layer
granularity like the driver does already for depth/hiz. This patch
introduces equivalent full resolve option.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 949a89202621eb73e9f9d4c7b452d9bf9afbfd40 |
|
09-Aug-2016 |
Jason Ekstrand <jason.ekstrand@intel.com> |
i965: Roll intel_reg.h into brw_defines.h
More than half of the stuff in intel_reg.h had nothing whatsoever to do
with registers and really belongs in brw_defines.h anyway.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| f709a0845792540544982740fa47be672825ee8a |
|
08-Dec-2015 |
Topi Pohjolainen <topi.pohjolainen@intel.com> |
i965: Add means for limiting color resolves
Until now there has been only one type of color buffer that needs
to resolved - namely single sampled fast clear. As even the
sampler engine in GPU doesn't understand the associated meta data,
the color values need to be always resolved prior to reading them.
From SKL onwards there is new scheme supported called the lossless
compression of single sampled color buffers. This is something that
is understood by the sampling engine and therefore resolving of
these types of buffers is not necessary before sampling.
This patch adds means to make the distinction when considering if
resolve is needed.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 76732932ec3918bb9cc04ccd37bc1a8c37051683 |
|
23-Nov-2015 |
Matt Turner <mattst88@gmail.com> |
i965: Drop #include of main/glheader.h.
It's never used.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 284dcad20a9a55278c1d3dd98f53e45650b22896 |
|
20-Aug-2015 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Fix typos in license
grep -lr 'sub license' | while read f; do \
sed --in-place -e 's/sub license/sublicense/' $f ;\
done
grep -lr 'NON-INFRINGEMENT' | while read f; do \
sed --in-place -e 's/NON-INFRINGEMENT/NONINFRINGEMENT/' $f ;\
done
As noted by Matt, both of these changes match the MIT license text found
at http://opensource.org/licenses/MIT.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| aa1a5c0c9e0de71ecd15e7190c121d6dd98471a6 |
|
20-Aug-2015 |
Ian Romanick <ian.d.romanick@intel.com> |
i965: Remove horizontal bars from file header comments
Why was that ever a thing?
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 28d9e90428282a5e0a6aa31ad858a5cf514d1264 |
|
07-Apr-2015 |
Marius Predut <marius.predut@intel.com> |
i965: replace __FUNCTION__ with __func__
Consistently just use C99's __func__ everywhere.
No functional changes.
Acked-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Marius Predut <marius.predut@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 5566747296f6a0b9dcadd056b0a9743c0fbce147 |
|
30-Apr-2014 |
Eric Anholt <eric@anholt.net> |
i965: Rename intel_regions.h to something more appropriate now.
We had the EGLimage structure laying around in intel_regions.h, but now
it's the only thing left in the file.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| e16c5c906316c58c0633e9bba02339ef981e5ef3 |
|
25-Apr-2014 |
Eric Anholt <eric@anholt.net> |
i965: Drop use of intel_region from miptrees.
Note: region->width/height used to reflect the total_width/height padding
of separate stencil, though mt->total_width didn't. region->width/height
was being used in EGL images, where the padded value would have been the
wrong one, so I converted them to use rb->Width/Height.
v2: Drop debug printf that slipped in (caught by Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| feb3d8dacd587683ded706049d696d1904cb87cd |
|
03-Mar-2014 |
Eric Anholt <eric@anholt.net> |
i965: Drop intel_check_front_buffer_rendering().
This was being applied in a subset of the places that
intel_prepare_render() was called, to set the same flag that
intel_prepare_render() was setting.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| dca350201e00c7cf1cfb009158f4abf27fbc96d2 |
|
06-Feb-2014 |
Marek Olšák <marek.olsak@amd.com> |
mesa: allow buffers to be mapped multiple times
OpenGL allows a buffer to be mapped only once, but we also map buffers
internally, e.g. in the software primitive restart fallback, for PBOs,
vbo_get_minmax_index, etc. This has always been a problem, but it will
be a bigger problem with persistent buffer mappings, which will prevent
all Mesa functions from mapping buffers for internal purposes.
This adds a driver interface to core Mesa which supports multiple buffer
mappings and allows 2 mappings: one for the GL user and one for Mesa.
Note that Gallium supports an unlimited number of buffer and texture
mappings, so it's not really an issue for Gallium.
v2: fix unmapping in xm_dd.c, remove the GL errors there
v3: fix the intel driver (by Fredrik)
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| eeed49f5f290793870c60b5b635b977a732a1eb4 |
|
27-Jan-2014 |
Mark Mueller <MarkKMueller@gmail.com> |
mesa: Change many Type P MESA_FORMATs to meet naming spec
Conversion of Type P formats as follows (w/related comment fixes):
s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g
s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g
s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g
s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g
s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g
s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g
s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g
s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g
s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g
s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g
s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g
s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g
s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g
s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g
s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g
s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g
s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g
s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g
s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g
s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g
s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g
s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g
s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g
s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g
s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g
s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g
s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g
s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g
s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g
s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g
s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g
s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g
s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g
s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g
Conflicts:
src/mesa/drivers/dri/i965/brw_surface_formats.c
src/mesa/main/format_pack.c
src/mesa/main/format_unpack.c
src/mesa/main/formats.c
src/mesa/main/texformat.c
src/mesa/main/texstore.c
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| ef145ba4ded6aafb28e3bda02fb348e6b8bff12a |
|
20-Jan-2014 |
Mark Mueller <MarkKMueller@gmail.com> |
mesa: Rename 4 color component unsigned byte MESA_FORMATs
Change all 4 color component unsigned byte formats to meet spec for P
Type formats:
s/MESA_FORMAT_RGBA8888\b/MESA_FORMAT_A8B8G8R8_UNORM/g
s/MESA_FORMAT_RGBA8888_REV\b/MESA_FORMAT_R8G8B8A8_UNORM/g
s/MESA_FORMAT_ARGB8888\b/MESA_FORMAT_B8G8R8A8_UNORM/g
s/MESA_FORMAT_ARGB8888_REV\b/MESA_FORMAT_A8R8G8B8_UNORM/g
s/MESA_FORMAT_RGBX8888\b/MESA_FORMAT_X8B8G8R8_UNORM/g
s/MESA_FORMAT_RGBX8888_REV\b/MESA_FORMAT_R8G8B8X8_UNORM/g
s/MESA_FORMAT_XRGB8888\b/MESA_FORMAT_B8G8R8X8_UNORM/g
s/MESA_FORMAT_XRGB8888_REV\b/MESA_FORMAT_X8R8G8B8_UNORM/g
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 877128505431adaf817dc8069172ebe4a1cdf5d8 |
|
17-Jan-2014 |
José Fonseca <jfonseca@vmware.com> |
s/Tungsten Graphics/VMware/
Tungsten Graphics Inc. was acquired by VMware Inc. in 2008. Leaving the
old copyright name is creating unnecessary confusion, hence this change.
This was the sed script I used:
$ cat tg2vmw.sed
# Run as:
#
# git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed
#
# Rename copyrights
s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g
/Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./
s/TUNGSTEN GRAPHICS/VMWARE/g
# Rename emails
s/alanh@tungstengraphics.com/alanh@vmware.com/
s/jens@tungstengraphics.com/jowen@vmware.com/g
s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/
s/jrfonseca\?@tungstengraphics.com/jfonseca@vmware.com/g
s/keithw\?@tungstengraphics.com/keithw@vmware.com/g
s/michel@tungstengraphics.com/daenzer@vmware.com/g
s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/
s/zack@tungstengraphics.com/zackr@vmware.com/
# Remove dead links
s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g
# C string src/gallium/state_trackers/vega/api_misc.c
s/"Tungsten Graphics, Inc"/"VMware, Inc"/
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 26f3ff8a916d7315b2d6d23ee9e52d946b68a136 |
|
02-Dec-2013 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Replace non-standard INLINE macro with "inline".
These are identical: main/compiler.h defines INLINE to "inline".
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| a7bdd4cba8ddcab8dff59ecaaa7efbd436c6c307 |
|
26-Nov-2013 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Drop trailing whitespace from the rest of the driver.
Performed via:
$ for file in *; do sed -i 's/ *//g'; done
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 48b9720272184d884b21524ae0b5318d42019793 |
|
19-Sep-2013 |
Eric Anholt <eric@anholt.net> |
i965: Reenable glBitmap() after the sRGB winsys enabling.
The format of the window system framebuffer changed from ARGB8888 to
SARGB8, but we're still supposed to render to it the same as ARGB8888
unless the user flipped the GL_FRAMEBUFFER_SRGB switch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
NOTE: This is a candidate for stable branches.
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| b15f1fc3c6b3b9dc4422940c412f80e581c9900d |
|
03-Jul-2013 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Move intel_context::perf_debug to brw_context.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| ca437579b3974b91a5298707c459908a628c1098 |
|
03-Jul-2013 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Pass brw_context to functions rather than intel_context.
This makes brw_context available in every function that used
intel_context. This makes it possible to start migrating fields from
intel_context to brw_context.
Surprisingly, this actually removes some code, as functions that use
OUT_BATCH don't need to declare "intel"; they just use "brw."
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| a69274454b6bde265a910ca5bd3199217431f5b5 |
|
03-Jul-2013 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Replace #include "intel_context.h" with brw_context.h.
brw_context.h includes intel_context.h, but additionally makes the
brw_context structure available. Switching this allows us to start
using brw_context in more places.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Paul Berry <stereotype441@gmail.com>
Acked-by: Anuj Phogat <anuj.phogat@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 3dbba95b72262344b82fba018b7c2c1208754cd2 |
|
21-Jun-2013 |
Eric Anholt <eric@anholt.net> |
i965: Move the remaining intel code to the i965 directory.
Now that i915's forked off, they don't need to live in a shared directory.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad.versace@linux.intel.com>
Acked-by: Adam Jackson <ajax@redhat.com>
(and I hear second hand that idr is OK with it, too)
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 9e68e191ac9d32f2f93e840a66127e724b442756 |
|
20-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move some pixel path support from drivers to shared.
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 77e0523fb7769df4bf43747e136b1653b2421b97 |
|
04-Oct-2007 |
Eric Anholt <eric@anholt.net> |
[965] Replace various alignment code with a shared ALIGN() macro.
In the process, fix some alignment issues:
- Scratch space allocation was aligned into units of 1KB, while the allocation
wanted units of bytes, so we never allocated enough space for scratch.
- GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of
ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 0aedb9a2042bef9c13358500f93acaf8459a74cb |
|
11-Sep-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: take the secondary color into account when drawing
bitmap. fix#10688
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| f6a89e1884535a6136900febc163ee930c1d2179 |
|
29-Aug-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: check NULL pointer. fix bug#12193
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| e66757c8babe6968ea2e506d1214c8063cbd0760 |
|
31-Jul-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: fix bad casts in do_blit_bitmap to support WindowPos correctly
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| bd9db5eed2cca6cd394c88adf09c70204be9da33 |
|
04-Jul-2007 |
Eric Anholt <eric@anholt.net> |
fix LogicOp/bitmap problem, bug 11133
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|
| 68da677ae29c0c38ca1bce1ce78087b9c7cf0e1a |
|
05-Oct-2006 |
Keith Whitwell <keith@tungstengraphics.com> |
Accelerate glBitmap with a color expand blit. Nice speedup for demos
like 'fire' that display a help message or fps number this way.
/external/mesa3d/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
|