/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | ScheduleDAGEmit.cpp | 35 void ScheduleDAG::EmitPhysRegCopy(SUnit *SU, argument 37 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); 46 for (SUnit::const_succ_iterator II = SU->Succs.begin(), 47 EE = SU->Succs.end(); II != EE; ++II) { 59 unsigned VRBase = MRI.createVirtualRegister(SU->CopyDstRC); 60 bool isNew = VRBaseMap.insert(std::make_pair(SU, VRBase)).second;
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H A D | ScheduleDAGPrinter.cpp | 77 std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU, argument 79 return G->getGraphNodeLabel(SU);
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H A D | LatencyPriorityQueue.cpp | 54 /// of SU, return it, otherwise return null. 55 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { argument 57 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); 72 void LatencyPriorityQueue::push(SUnit *SU) { argument 76 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 78 if (getSingleUnscheduledPred(I->getSUnit()) == SU) 81 NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking; 83 Queue.push_back(SU); 91 ScheduledNode(SUnit *SU) argument 104 AdjustPriorityOfUnscheduledPreds(SUnit *SU) argument 133 remove(SUnit *SU) argument [all...] |
H A D | ScoreboardHazardRecognizer.cpp | 108 ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { argument 118 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 157 DEBUG(dbgs() << "SU(" << SU->NodeNum << "): "); 158 DEBUG(DAG->dumpNode(SU)); 170 void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) { argument 176 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
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H A D | CriticalAntiDepBreaker.cpp | 157 /// CriticalPathStep - Return the next SUnit after SU on the bottom-up 159 static const SDep *CriticalPathStep(const SUnit *SU) { argument 163 for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end(); 435 const SUnit *SU = &SUnits[i]; local 436 MISUnitMap[SU->getInstr()] = SU; 437 if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency) 438 Max = SU; 628 const SUnit *SU = MISUnitMap[Q->second->getParent()]; local [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
H A D | SPUHazardRecognizers.cpp | 44 SPUHazardRecognizer::getHazardType(SUnit *SU, int Stalls) argument 52 const SDNode *Node = SU->getNode()->getFlaggedMachineNode(); 129 void SPUHazardRecognizer::EmitInstruction(SUnit *SU) argument
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | SimpleConstraintManager.h | 25 SubEngine *SU; member in class:clang::ento::SimpleConstraintManager 29 : SU(subengine), SVB(SB) {}
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/external/llvm/lib/Target/ARM/ |
H A D | ARMHazardRecognizer.cpp | 35 ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { argument 38 MachineInstr *MI = SU->getInstr(); 73 return ScoreboardHazardRecognizer::getHazardType(SU, Stalls); 82 void ARMHazardRecognizer::EmitInstruction(SUnit *SU) { argument 83 MachineInstr *MI = SU->getInstr(); 89 ScoreboardHazardRecognizer::EmitInstruction(SU);
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | LatencyPriorityQueue.h | 57 void addNode(const SUnit *SU) { argument 61 void updateNode(const SUnit *SU) { argument 84 virtual void remove(SUnit *SU); 95 void AdjustPriorityOfUnscheduledPreds(SUnit *SU); 96 SUnit *getSingleUnscheduledPred(SUnit *SU);
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMHazardRecognizer.cpp | 35 ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { argument 38 MachineInstr *MI = SU->getInstr(); 73 return ScoreboardHazardRecognizer::getHazardType(SU, Stalls); 83 void ARMHazardRecognizer::EmitInstruction(SUnit *SU) { argument 84 MachineInstr *MI = SU->getInstr(); 108 ScoreboardHazardRecognizer::EmitInstruction(SU);
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/external/llvm/lib/CodeGen/ |
H A D | LatencyPriorityQueue.cpp | 55 /// of SU, return it, otherwise return null. 56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { argument 58 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); 73 void LatencyPriorityQueue::push(SUnit *SU) { argument 77 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 79 if (getSingleUnscheduledPred(I->getSUnit()) == SU) 82 NumNodesSolelyBlocking[SU->NodeNum] = NumNodesBlocking; 84 Queue.push_back(SU); 92 scheduledNode(SUnit *SU) argument 105 AdjustPriorityOfUnscheduledPreds(SUnit *SU) argument 134 remove(SUnit *SU) argument [all...] |
H A D | ScheduleDAGPrinter.cpp | 79 std::string DOTGraphTraits<ScheduleDAG*>::getNodeLabel(const SUnit *SU, argument 81 return G->getGraphNodeLabel(SU);
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H A D | ScoreboardHazardRecognizer.cpp | 110 ScoreboardHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { argument 120 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 157 DEBUG(dbgs() << "SU(" << SU->NodeNum << "): "); 158 DEBUG(DAG->dumpNode(SU)); 170 void ScoreboardHazardRecognizer::EmitInstruction(SUnit *SU) { argument 176 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
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H A D | CriticalAntiDepBreaker.cpp | 127 /// CriticalPathStep - Return the next SUnit after SU on the bottom-up 129 static const SDep *CriticalPathStep(const SUnit *SU) { argument 133 for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end(); 441 const SUnit *SU = &SUnits[i]; local 442 MISUnitMap[SU->getInstr()] = SU; 443 if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency) 444 Max = SU; 646 const SUnit *SU = MISUnitMap[Q->second->getParent()]; local [all...] |
H A D | PostRASchedulerList.cpp | 191 void ReleaseSucc(SUnit *SU, SDep *SuccEdge); 192 void ReleaseSuccessors(SUnit *SU); 193 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle); 258 if (SUnit *SU = Sequence[i]) 259 SU->dump(this); 418 for (const SUnit &SU : SUnits) { 419 SU.dumpAll(this); 459 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) { argument 478 // SuccSU->setDepthToAtLeast(SU->getDepth() + SuccEdge->getLatency()); 493 /// ReleaseSuccessors - Call ReleaseSucc on each of SU' 494 ReleaseSuccessors(SUnit *SU) argument 504 ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) argument [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGVLIW.cpp | 87 void releaseSucc(SUnit *SU, const SDep &D); 88 void releaseSuccessors(SUnit *SU); 89 void scheduleNodeTopDown(SUnit *SU, unsigned CurCycle); 116 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) { argument 131 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency()); 140 void ScheduleDAGVLIW::releaseSuccessors(SUnit *SU) { argument 142 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 147 releaseSucc(SU, *I); 154 void ScheduleDAGVLIW::scheduleNodeTopDown(SUnit *SU, unsigne argument [all...] |
H A D | ResourcePriorityQueue.cpp | 70 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { argument 72 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); 107 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, argument 110 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 145 static unsigned numberCtrlDepsInSU(SUnit *SU) { argument 147 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 155 static unsigned numberCtrlPredInSU(SUnit *SU) { argument 173 SUnit *SU = &(*SUnits)[i]; local 215 getSingleUnscheduledPred(SUnit *SU) argument 231 push(SUnit *SU) argument 246 isResourceAvailable(SUnit *SU) argument 289 reserveResources(SUnit *SU) argument 326 rawRegPressureDelta(SUnit *SU, unsigned RCId) argument 360 regPressureDelta(SUnit *SU, bool RawPressure) argument 401 SUSchedulingCost(SUnit *SU) argument 471 scheduledNode(SUnit *SU) argument 547 initNumRegDefsLeft(SUnit *SU) argument 579 adjustPriorityOfUnscheduledPreds(SUnit *SU) argument 632 remove(SUnit *SU) argument [all...] |
H A D | ScheduleDAGSDNodes.cpp | 78 SUnit *SU = &SUnits.back(); local 83 SU->SchedulingPref = Sched::None; 85 SU->SchedulingPref = TLI.getSchedulingPreference(N); 86 return SU; 90 SUnit *SU = newSUnit(Old->getNode()); local 91 SU->OrigNode = Old->OrigNode; 92 SU->Latency = Old->Latency; 93 SU->isVRegCycle = Old->isVRegCycle; 94 SU->isCall = Old->isCall; 95 SU [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | ScheduleDAGList.cpp | 81 void ReleaseSucc(SUnit *SU, const SDep &D); 82 void ReleaseSuccessors(SUnit *SU); 83 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle); 108 void ScheduleDAGList::ReleaseSucc(SUnit *SU, const SDep &D) { argument 121 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency()); 129 void ScheduleDAGList::ReleaseSuccessors(SUnit *SU) { argument 131 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); 136 ReleaseSucc(SU, *I); 143 void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigne argument [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
H A D | PPCHazardRecognizers.cpp | 125 getHazardType(SUnit *SU, int Stalls) { argument 128 const SDNode *Node = SU->getNode()->getGluedMachineNode(); 226 void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) { argument 227 const SDNode *Node = SU->getNode()->getGluedMachineNode();
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/external/llvm/lib/Target/AMDGPU/ |
H A D | GCNHazardRecognizer.cpp | 33 void GCNHazardRecognizer::EmitInstruction(SUnit *SU) { argument 34 EmitInstruction(SU->getInstr()); 42 GCNHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { argument 43 MachineInstr *MI = SU->getInstr(); 57 unsigned GCNHazardRecognizer::PreEmitNoops(SUnit *SU) { argument 58 return PreEmitNoops(SU->getInstr());
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H A D | R600MachineScheduler.cpp | 58 SUnit *SU = nullptr; local 98 if (!SU && ((AllowSwitchToAlu && CurInstKind != IDAlu) || 101 SU = pickAlu(); 102 if (!SU && !PhysicalRegCopy.empty()) { 103 SU = PhysicalRegCopy.front(); 106 if (SU) { 113 if (!SU) { 115 SU = pickOther(IDFetch); 116 if (SU) 121 if (!SU) { 144 schedNode(SUnit *SU, bool IsTopNode) argument 192 releaseTopNode(SUnit *SU) argument 196 releaseBottomNode(SUnit *SU) argument 295 getInstKind(SUnit* SU) argument 324 SUnit *SU = *It; local 433 SUnit *SU = AttemptFillSlot(3, true); local 442 SUnit *SU = AttemptFillSlot(Chan, false); local 456 SUnit *SU = nullptr; local [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCHazardRecognizers.cpp | 26 bool PPCDispatchGroupSBHazardRecognizer::isLoadAfterStore(SUnit *SU) { argument 28 if (isBCTRAfterSet(SU)) 31 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); 38 // SU is a load; for any predecessors in this dispatch group, that are stores, 40 for (unsigned i = 0, ie = (unsigned) SU->Preds.size(); i != ie; ++i) { 41 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); 45 if (!SU->Preds[i].isNormalMemory() && !SU->Preds[i].isBarrier()) 49 if (SU->Preds[i].getSUnit() == CurGroup[j]) 56 bool PPCDispatchGroupSBHazardRecognizer::isBCTRAfterSet(SUnit *SU) { argument 141 getHazardType(SUnit *SU, int Stalls) argument 148 ShouldPreferAnother(SUnit *SU) argument 157 PreEmitNoops(SUnit *SU) argument 176 EmitInstruction(SUnit *SU) argument 328 getHazardType(SUnit *SU, int Stalls) argument 388 EmitInstruction(SUnit *SU) argument [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonMachineScheduler.h | 86 bool isResourceAvailable(SUnit *SU); 87 bool reserveResources(SUnit *SU); 114 SUnit *SU; member in struct:llvm::ConvergingVLIWScheduler::SchedCandidate 122 SchedCandidate(): SU(nullptr), SCost(0) {} 175 bool checkHazard(SUnit *SU); 177 void releaseNode(SUnit *SU, unsigned ReadyCycle); 181 void bumpNode(SUnit *SU); 185 void removeReady(SUnit *SU); 213 void schedNode(SUnit *SU, bool IsTopNode) override; 215 void releaseTopNode(SUnit *SU) overrid [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAGInstrs.h | 38 SUnit *SU; member in struct:llvm::VReg2SUnit 40 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) argument 41 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} 53 unsigned OperandIndex, SUnit *SU) 54 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} 60 SUnit *SU; member in struct:llvm::PhysRegSUOper 64 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {} 166 /// No other SU ever gets scheduled around it (except in the special 193 /// Add dependencies as needed from all SUs in list to SU 52 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, unsigned OperandIndex, SUnit *SU) argument 194 addChainDependencies(SUnit *SU, SUList &sus, unsigned Latency) argument [all...] |