| /external/capstone/arch/AArch64/ |
| H A D | AArch64AddressingModes.h | 125 /// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the
129 // Extract the N, imms, and immr fields.
131 unsigned immr = (val >> 6) & 0x3f; local
139 unsigned R = immr & (size - 1);
156 /// in the form "N:immr:imms" (where the immr and imms fields are each 6 bits)
|
| H A D | AArch64InstPrinter.c | 139 int64_t immr = MCOperand_getImm(Op2); local
142 if (Opcode == AArch64_UBFMWri && imms != 0x1F && ((imms + 1) == immr)) {
146 ((imms + 1 == immr))) {
151 shift = immr;
154 shift = immr;
157 shift = immr;
160 shift = immr;
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 113 int64_t immr = Op2.getImm(); local
115 if (Opcode == AArch64::UBFMWri && imms != 0x1F && ((imms + 1) == immr)) {
119 ((imms + 1 == immr))) {
124 shift = immr;
127 shift = immr;
130 shift = immr;
133 shift = immr;
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 212 /// the form N:immr:imms.
290 /// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the
293 // Extract the N, imms, and immr fields.
295 unsigned immr = (val >> 6) & 0x3f; local
302 unsigned R = immr & (size - 1);
318 /// in the form "N:immr:imms" (where the immr and imms fields are each 6 bits)
|
| /external/v8/src/arm64/ |
| H A D | assembler-arm64-inl.h | 1034 Instr Assembler::ImmR(unsigned immr, unsigned reg_size) { argument
1035 DCHECK(((reg_size == kXRegSizeInBits) && is_uint6(immr)) ||
1036 ((reg_size == kWRegSizeInBits) && is_uint5(immr)));
1038 DCHECK(is_uint6(immr));
1039 return immr << ImmR_offset;
1052 Instr Assembler::ImmRotate(unsigned immr, unsigned reg_size) { argument
1054 DCHECK(((reg_size == kXRegSizeInBits) && is_uint6(immr)) ||
1055 ((reg_size == kWRegSizeInBits) && is_uint5(immr)));
1057 return immr << ImmRotate_offset;
|
| H A D | assembler-arm64.cc | 1286 void Assembler::bfm(const Register& rd, const Register& rn, int immr, argument
1291 ImmR(immr, rd.SizeInBits()) |
1297 void Assembler::sbfm(const Register& rd, const Register& rn, int immr, argument
1302 ImmR(immr, rd.SizeInBits()) |
1308 void Assembler::ubfm(const Register& rd, const Register& rn, int immr, argument
1313 ImmR(immr, rd.SizeInBits()) |
2654 // N imms immr size S R
|
| /external/vixl/src/aarch64/ |
| H A D | assembler-aarch64.cc | 593 unsigned immr,
597 Emit(SF(rd) | BFM | N | ImmR(immr, rd.GetSizeInBits()) |
604 unsigned immr,
608 Emit(SF(rd) | SBFM | N | ImmR(immr, rd.GetSizeInBits()) |
615 unsigned immr,
619 Emit(SF(rd) | UBFM | N | ImmR(immr, rd.GetSizeInBits()) |
4439 // N imms immr size S R
591 bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
602 sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
613 ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
|
| H A D | assembler-aarch64.h | 687 unsigned immr,
693 unsigned immr,
699 unsigned immr,
2712 static Instr ImmR(unsigned immr, unsigned reg_size) { argument
2713 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
2714 ((reg_size == kWRegSize) && IsUint5(immr)));
2716 VIXL_ASSERT(IsUint6(immr));
2717 return immr << ImmR_offset;
2728 static Instr ImmRotate(unsigned immr, unsigned reg_size) { argument
2730 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) ||
[all...] |
| H A D | macro-assembler-aarch64.h | 1017 unsigned immr,
1023 bfm(rd, rn, immr, imms);
1790 unsigned immr,
1796 sbfm(rd, rn, immr, imms);
2052 unsigned immr,
2058 ubfm(rd, rn, immr, imms);
1015 Bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
1788 Sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
2050 Ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1643 int immr = SrlImm - ShlImm; local
1644 Immr = immr < 0 ? immr + VT.getSizeInBits() : immr;
|
| /external/valgrind/VEX/priv/ |
| H A D | guest_arm64_toIR.c | 2334 ULong immN, ULong imms, ULong immr, Bool immediate,
2339 vassert(immr < (1ULL << 6));
2359 ULong R = immr & levels;
2486 sf op 100100 N immr imms Rn Rd
2618 sf 10 100110 N immr imms nn dd
2619 UBFM Wd, Wn, #immr, #imms when sf=0, N=0, immr[5]=0, imms[5]=0
2620 UBFM Xd, Xn, #immr, #imms when sf=1, N=1
2622 sf 00 100110 N immr imms nn dd
2623 SBFM Wd, Wn, #immr, #imm
2333 dbm_DecodeBitMasks( ULong* wmask, ULong* tmask, ULong immN, ULong imms, ULong immr, Bool immediate, UInt M ) argument
[all...] |