| /external/llvm/test/MC/ARM/ |
| H A D | thumb2be-movt-encoding.s | 4 movt r9, :upper16:(_bar) label
5 @ CHECK-LE: movt r9, :upper16:_bar @ encoding: [0xc0'A',0xf2'A',0b0000AAAA,0x09]
7 @ CHECK-BE: movt r9, :upper16:_bar @ encoding: [0xf2,0b1100AAAA,0x09'A',A]
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| H A D | thumbv8m.s | 94 // CHECK: movt r1, #65535 @ encoding: [0xcf,0xf6,0xff,0x71]
95 movt r1, #0xffff label
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| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerMIPS32.cpp | 868 void AssemblerMIPS32::movt(const Operand *OpRd, const Operand *OpRs, function in class:Ice::MIPS32::AssemblerMIPS32
871 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movt");
872 const IValueT Rs = encodeGPRegister(OpRs, "Rs", "movt");
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| /external/v8/src/mips/ |
| H A D | assembler-mips.cc | 2132 void Assembler::movt(Register rd, Register rs, uint16_t cc) { function in class:v8::Assembler
|
| /external/v8/src/arm/ |
| H A D | assembler-arm.cc | 328 // specially coded on ARM means that it is a movw/movt instruction, or is an
931 // movt dst, #target16_1
949 // Patch with movw/movt.
960 patcher.masm()->movt(dst, target16_1);
1178 // Otherwise, use immediate load if movw / movt is available.
1196 // A movw / movt or mov / orr immediate load.
1235 // Make sure the movw/movt doesn't get separated.
1239 movt(target, imm32 >> 16, cond);
1261 movt(target, 0, cond);
1611 // sequence of movw/movt o
1644 void Assembler::movt(Register reg, uint32_t immediate, Condition cond) { function in class:v8::internal::Assembler
[all...] |
| /external/v8/src/mips64/ |
| H A D | assembler-mips64.cc | 2384 void Assembler::movt(Register rd, Register rs, uint16_t cc) { function in class:v8::internal::Assembler
|
| /external/vixl/src/aarch32/ |
| H A D | assembler-aarch32.cc | 7315 void Assembler::movt(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler
7339 Delegate(kMovt, &Assembler::movt, cond, rd, operand);
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| H A D | assembler-aarch32.h | 2624 void movt(Condition cond, Register rd, const Operand& operand);
2625 void movt(Register rd, const Operand& operand) { movt(al, rd, operand); } function in class:vixl::aarch32::Assembler
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| H A D | disasm-aarch32.cc | 1926 void Disassembler::movt(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::Disassembler
9299 movt(CurrentCond(), Register(rd), imm);
[all...] |