Searched defs:teq (Results 1 - 7 of 7) sorted by relevance
/external/swiftshader/third_party/subzero/src/ |
H A D | IceAssemblerMIPS32.cpp | 1148 void AssemblerMIPS32::teq(const Operand *OpRs, const Operand *OpRt, function in class:Ice::MIPS32::AssemblerMIPS32 1151 const IValueT Rs = encodeGPRegister(OpRs, "Rs", "teq"); 1152 const IValueT Rt = encodeGPRegister(OpRt, "Rt", "teq");
|
/external/v8/src/mips/ |
H A D | assembler-mips.cc | 2068 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::Assembler
|
/external/v8/src/arm/ |
H A D | assembler-arm.cc | 1562 void Assembler::teq(Register src1, const Operand& src2, Condition cond) { function in class:v8::internal::Assembler
|
/external/v8/src/mips64/ |
H A D | assembler-mips64.cc | 2320 void Assembler::teq(Register rs, Register rt, uint16_t code) { function in class:v8::internal::Assembler
|
/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.cc | 12740 void Assembler::teq(Condition cond, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler 12807 Delegate(kTeq, &Assembler::teq, cond, rn, operand);
|
H A D | assembler-aarch32.h | 3565 void teq(Condition cond, Register rn, const Operand& operand); 3566 void teq(Register rn, const Operand& operand) { teq(al, rn, operand); } function in class:vixl::aarch32::Assembler
|
H A D | disasm-aarch32.cc | 3298 void Disassembler::teq(Condition cond, Register rn, const Operand& operand) { function in class:vixl::aarch32::Disassembler 8694 teq(CurrentCond(), Register(rn), imm); 19396 teq(CurrentCond(), 19416 teq(CurrentCond(), [all...] |
Completed in 875 milliseconds