Searched refs:CTLZ (Results 1 - 25 of 48) sorted by relevance

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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DISDOpcodes.h320 BSWAP, CTTZ, CTLZ, CTPOP, enumerator in enum:llvm::ISD::NodeType
/external/llvm/lib/Transforms/Utils/
H A DIntegerDivision.cpp183 Function *CTLZ = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, local
255 Value *Tmp0 = Builder.CreateCall(CTLZ, {Divisor, True});
256 Value *Tmp1 = Builder.CreateCall(CTLZ, {Dividend, True});
/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h342 BSWAP, CTTZ, CTLZ, CTPOP, BITREVERSE, enumerator in enum:llvm::ISD::NodeType
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp160 case ISD::CTLZ:
H A DLegalizeVectorTypes.cpp68 case ISD::CTLZ:
444 case ISD::CTLZ:
982 case ISD::CTLZ:
1295 case ISD::CTLZ:
H A DLegalizeIntegerTypes.cpp60 case ISD::CTLZ: Res = PromoteIntRes_CTLZ(N); break;
315 Op = DAG.getNode(ISD::CTLZ, dl, NVT, Op);
1101 case ISD::CTLZ: ExpandIntRes_CTLZ(N, Lo, Hi); break;
1705 SDValue LoLZ = DAG.getNode(ISD::CTLZ, dl, NVT, Lo);
1706 SDValue HiLZ = DAG.getNode(ISD::CTLZ, dl, NVT, Hi);
H A DLegalizeDAG.cpp2834 case ISD::CTLZ: {
2865 // If ISD::CTLZ is legal and CTPOP isn't, then do that instead.
2867 TLI.isOperationLegalOrCustom(ISD::CTLZ, VT))
2870 DAG.getNode(ISD::CTLZ, dl, VT, Tmp3));
2968 case ISD::CTLZ:
3838 case ISD::CTLZ:
3851 } else if (Node->getOpcode() == ISD::CTLZ) {
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
H A DBlackfinISelLowering.cpp72 // The expansion of CTLZ/CTTZ uses AND/OR, so we might as well promote
74 setOperationAction(ISD::CTLZ, MVT::i16, Promote);
112 // i32 has native CTPOP, but not CTLZ/CTTZ
113 setOperationAction(ISD::CTLZ, MVT::i32, Expand);
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp113 setOperationAction(ISD::CTLZ, MVT::i32, Promote);
114 setOperationAction(ISD::CTLZ, MVT::i64, Legal);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp286 case ISD::CTLZ:
1032 unsigned Opc = Op.getOpcode() == ISD::CTLZ_ZERO_UNDEF ? ISD::CTLZ : ISD::CTTZ;
H A DLegalizeDAG.cpp2684 // This trivially expands to CTLZ.
2685 return DAG.getNode(ISD::CTLZ, dl, Op.getValueType(), Op);
2686 case ISD::CTLZ: {
2692 SDValue CTLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, VT, Op);
2696 DAG.getConstant(len, dl, VT), CTLZ);
2730 // If ISD::CTLZ is legal and CTPOP isn't, then do that instead.
2732 TLI.isOperationLegalOrCustom(ISD::CTLZ, VT))
2735 DAG.getNode(ISD::CTLZ, dl, VT, Tmp3));
2748 case ISD::CTLZ:
4012 case ISD::CTLZ
[all...]
H A DSelectionDAGDumper.cpp321 case ISD::CTLZ: return "ctlz";
H A DLegalizeVectorTypes.cpp72 case ISD::CTLZ:
630 case ISD::CTLZ:
1499 case ISD::CTLZ:
2150 case ISD::CTLZ:
/external/llvm/lib/Target/X86/
H A DX86IntrinsicsInfo.h773 ISD::CTLZ, 0),
775 ISD::CTLZ, 0),
777 ISD::CTLZ, 0),
779 ISD::CTLZ, 0),
781 ISD::CTLZ, 0),
783 ISD::CTLZ, 0),
H A DX86ISelLowering.cpp334 setOperationPromotedToType(ISD::CTLZ , MVT::i8 , MVT::i32);
337 setOperationAction(ISD::CTLZ , MVT::i8 , Custom);
338 setOperationAction(ISD::CTLZ , MVT::i16 , Custom);
339 setOperationAction(ISD::CTLZ , MVT::i32 , Custom);
344 setOperationAction(ISD::CTLZ , MVT::i64 , Custom);
677 setOperationAction(ISD::CTLZ, VT, Expand);
873 setOperationAction(ISD::CTLZ, MVT::v16i8, Custom);
874 setOperationAction(ISD::CTLZ, MVT::v8i16, Custom);
875 // ISD::CTLZ v4i32 - scalarization is faster.
876 // ISD::CTLZ v2i6
[all...]
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
H A DSPUISelLowering.cpp283 // SPU does not have BSWAP. It does have i32 support CTLZ.
300 setOperationAction(ISD::CTLZ , MVT::i8, Promote);
301 setOperationAction(ISD::CTLZ , MVT::i16, Promote);
302 setOperationAction(ISD::CTLZ , MVT::i32, Legal);
303 setOperationAction(ISD::CTLZ , MVT::i64, Expand);
304 setOperationAction(ISD::CTLZ , MVT::i128, Expand);
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp120 setOperationAction(ISD::CTLZ, MVT::i8, Expand);
121 setOperationAction(ISD::CTLZ, MVT::i16, Expand);
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp127 setOperationAction(ISD::CTLZ, MVT::i8, Expand);
128 setOperationAction(ISD::CTLZ, MVT::i16, Expand);
/external/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp102 setOperationAction(ISD::CTLZ, MVT::i64, Custom);
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp309 setOperationAction(ISD::CTLZ, VT, Expand);
345 setOperationAction(ISD::CTLZ, MVT::i64, Custom);
398 setOperationAction(ISD::CTLZ, VT, Expand);
723 case ISD::CTLZ:
2474 return Opc == ISD::CTLZ || Opc == ISD::CTLZ_ZERO_UNDEF;
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp169 setOperationAction(ISD::CTLZ, MVT::i32, Expand);
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1859 setOperationAction(ISD::CTLZ, MVT::i8, Promote);
1860 setOperationAction(ISD::CTLZ, MVT::i16, Promote);
1942 ISD::CTPOP, ISD::CTLZ, ISD::CTTZ,
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp257 setOperationAction(ISD::CTLZ, MVT::i16, Legal);
258 setOperationAction(ISD::CTLZ, MVT::i32, Legal);
259 setOperationAction(ISD::CTLZ, MVT::i64, Legal);
/external/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp113 setOperationAction(ISD::CTLZ, MVT::i32, Legal);
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
H A DAlphaISelLowering.cpp91 setOperationAction(ISD::CTLZ , MVT::i64 , Expand);

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