| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.h | 90 getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
91 if (ConstraintCode == "o")
93 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 53 char ConstraintCode,
191 char ConstraintCode,
194 switch (ConstraintCode) {
190 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 352 getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
353 if (ConstraintCode == "Q")
355 else if (ConstraintCode == "o")
357 else if (ConstraintCode.size() == 2) {
358 if (ConstraintCode[0] == 'U') {
359 switch(ConstraintCode[1]) {
379 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 218 getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
219 if (ConstraintCode == "o")
221 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelDAGToDAG.cpp | 63 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintCode,
253 const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) {
255 switch (ConstraintCode) {
252 SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintCode, std::vector<SDValue> &OutOps) argument
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| H A D | MipsISelDAGToDAG.cpp | 96 char ConstraintCode,
338 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument
340 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 416 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
417 if (ConstraintCode.size() == 1) {
418 switch(ConstraintCode[0]) {
431 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 625 getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
626 if (ConstraintCode == "es")
628 else if (ConstraintCode == "o")
630 else if (ConstraintCode == "Q")
632 else if (ConstraintCode == "Z")
634 else if (ConstraintCode == "Zy")
636 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 111 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
286 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument
289 switch (ConstraintCode) {
|
| /external/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 109 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override;
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 543 getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
544 if (ConstraintCode == "R")
546 else if (ConstraintCode == "ZC")
548 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 812 getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
813 if (ConstraintCode == "i")
815 else if (ConstraintCode == "o")
817 else if (ConstraintCode == "v")
819 else if (ConstraintCode == "X")
821 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 550 unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
551 if (ConstraintCode == "Q")
556 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| H A D | AlphaISelDAGToDAG.cpp | 154 char ConstraintCode,
157 switch (ConstraintCode) {
153 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| H A D | SelectionDAGISel.h | 84 char ConstraintCode,
83 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2782 assert(!ConstraintCode.empty() && "No known constraint!");
2783 return isdigit(ConstraintCode[0]);
2789 assert(!ConstraintCode.empty() && "No known constraint!");
2790 return atoi(ConstraintCode.c_str());
2964 getRegForInlineAsmConstraint(OpInfo.ConstraintCode, OpInfo.ConstraintVT);
2966 getRegForInlineAsmConstraint(Input.ConstraintCode, Input.ConstraintVT);
3137 OpInfo.ConstraintCode = OpInfo.Codes[BestIdx];
3143 /// OpInfo.ConstraintCode and OpInfo.ConstraintType.
3151 OpInfo.ConstraintCode = OpInfo.Codes[0];
3152 OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
[all...] |
| H A D | SelectionDAGBuilder.cpp | 5726 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5920 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5923 TLI.getRegForInlineAsmConstraint(Input.ConstraintCode,
6057 Twine(OpInfo.ConstraintCode) + "'!");
6155 TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode,
6159 Twine(OpInfo.ConstraintCode) + "'!");
6192 Twine(OpInfo.ConstraintCode) + "'!");
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2392 assert(!ConstraintCode.empty() && "No known constraint!");
2393 return isdigit(static_cast<unsigned char>(ConstraintCode[0]));
2399 assert(!ConstraintCode.empty() && "No known constraint!");
2400 return atoi(ConstraintCode.c_str());
2574 getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode,
2577 getRegForInlineAsmConstraint(TRI, Input.ConstraintCode,
2746 OpInfo.ConstraintCode = OpInfo.Codes[BestIdx];
2751 /// AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType.
2759 OpInfo.ConstraintCode = OpInfo.Codes[0];
2760 OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
[all...] |
| H A D | FunctionLoweringInfo.cpp | 188 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| H A D | TargetLowering.h | 1394 /// ConstraintCode - This contains the actual string for the code, like "m".
1397 std::string ConstraintCode;
1422 ConstraintCode(info.ConstraintCode),
1457 /// OpInfo.ConstraintCode and OpInfo.ConstraintType. If the actual operand
|
| /external/llvm/include/llvm/Target/ |
| H A D | TargetLowering.h | 2828 std::string ConstraintCode;
2878 /// AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType.
2901 virtual unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const {
2902 if (ConstraintCode == "i")
2904 else if (ConstraintCode == "m")
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 225 char ConstraintCode,
2232 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument
2235 switch (ConstraintCode) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| H A D | SPUISelDAGToDAG.cpp | 268 char ConstraintCode,
271 switch (ConstraintCode) {
267 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 145 char ConstraintCode,
144 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, std::vector<SDValue> &OutOps) argument
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 270 char ConstraintCode,
3195 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, argument
3197 assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
|