Searched refs:DIVU (Results 1 - 11 of 11) sorted by relevance
| /external/valgrind/none/tests/mips64/ |
| H A D | arithmetic_instruction.c | 9 DDIV, DDIVU, DIV, DIVU, enumerator in enum:__anon29705
166 case DIVU:
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| /external/v8/src/mips/ |
| H A D | constants-mips.h | 435 DIVU = ((3U << 3) + 3),
933 FunctionFieldToBitNumber(DIV) | FunctionFieldToBitNumber(DIVU) |
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| H A D | assembler-mips.cc | 1662 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU);
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| H A D | simulator-mips.cc | 3835 case DIVU:
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| /external/v8/src/mips64/ |
| H A D | constants-mips64.h | 424 DIVU = ((3U << 3) + 3),
976 FunctionFieldToBitNumber(DIVU) | FunctionFieldToBitNumber(DDIVU) |
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| H A D | assembler-mips64.cc | 1686 GenInstrRegister(SPECIAL, rs, rt, zero_reg, 0, DIVU);
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| H A D | simulator-mips64.cc | 3828 case DIVU:
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| /external/valgrind/coregrind/ |
| H A D | m_main.c | 3309 dividend is less than the divisor, one execution of DIVU is all that
3322 (unsigned long long for DIVU and long long for DIVS. They are
3327 In practice, these would be replaced with uses of the machine's DIVU
3330 static UInt DIVU ( ULong u, UInt v ) function
3352 return DIVU(u, v) // just do one division.
3357 q1 = DIVU(u1, v) // First quotient digit.
3360 q0 = DIVU((k << 32) + u0, v) // 2nd quot. digit.
3370 q1 = DIVU(u1, v1) // Get quotient from
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| /external/pcre/dist2/src/sljit/ |
| H A D | sljitNativeMIPS_common.c | 126 #define DIVU (HI(0) | LO(27)) macro
1068 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
1072 FAIL_IF(push_inst(compiler, ((op | 0x2) == SLJIT_DIV_UW ? DIVU : DIV) | S(SLJIT_R0) | T(SLJIT_R1), MOVABLE_INS));
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| /external/capstone/arch/Mips/ |
| H A D | MipsGenAsmWriter.inc | 565 33577796U, // DIVU
2279 0U, // DIVU
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1048 case Mips::DIVU:
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