| /external/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 76 const DebugLoc &DL, unsigned DReg,
90 const DebugLoc &DL, unsigned DReg,
148 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, local
150 if (DReg != ARM::NoRegister) return ARM::ssub_1;
446 const DebugLoc &DL, unsigned DReg, unsigned Lane,
453 .addReg(DReg, 0, Lane);
493 const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) {
499 .addReg(DReg)
444 createExtractSubreg( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL, unsigned DReg, unsigned Lane, const TargetRegisterClass *TRC) argument
491 createInsertSubreg( MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const DebugLoc &DL, unsigned DReg, unsigned Lane, unsigned ToInsert) argument
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| H A D | ARMBaseInstrInfo.cpp | 4219 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass); local
4222 if (DReg != ARM::NoRegister)
4223 return DReg;
4226 DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass);
4228 assert(DReg && "S-register with no D super-register?");
4229 return DReg;
4248 MachineInstr &MI, unsigned DReg,
4252 if (MI.definesRegister(DReg, TRI) || MI.readsRegister(DReg, TRI)) {
4258 ImplicitSReg = TRI->getSubReg(DReg,
4247 getImplicitSPRUseForDPRUse(const TargetRegisterInfo *TRI, MachineInstr &MI, unsigned DReg, unsigned Lane, unsigned &ImplicitSReg) argument
4276 unsigned DstReg, SrcReg, DReg; local
4530 unsigned DReg = TRI->getMatchingSuperReg(Reg, ARM::ssub_0, local
[all...] |
| /external/llvm/lib/Target/Mips/ |
| H A D | Mips16FrameLowering.cpp | 73 unsigned DReg = MRI->getDwarfRegNum(Reg, true); local
75 MCCFIInstruction::createOffset(nullptr, DReg, Offset));
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 860 unsigned DReg = countTrailingZeros(Defs); local
861 DEBUG(dbgs() << "Renaming %FP" << KReg << " as imp %FP" << DReg << "\n"); local
862 std::swap(Stack[getSlot(KReg)], Stack[getSlot(DReg)]);
863 std::swap(RegMap[KReg], RegMap[DReg]);
865 Defs &= ~(1 << DReg);
891 unsigned DReg = countTrailingZeros(Defs); local
892 DEBUG(dbgs() << "Defining %FP" << DReg << " as 0\n");
894 pushReg(DReg);
895 Defs &= ~(1 << DReg);
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 896 unsigned DReg = CountTrailingZeros_32(Defs);
897 DEBUG(dbgs() << "Renaming %FP" << KReg << " as imp %FP" << DReg << "\n");
898 std::swap(Stack[getSlot(KReg)], Stack[getSlot(DReg)]);
899 std::swap(RegMap[KReg], RegMap[DReg]);
901 Defs &= ~(1 << DReg);
927 unsigned DReg = CountTrailingZeros_32(Defs);
928 DEBUG(dbgs() << "Defining %FP" << DReg << " as 0\n");
930 pushReg(DReg);
931 Defs &= ~(1 << DReg);
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3386 unsigned DReg = Inst.getOperand(0).getReg(); local
3389 unsigned TmpReg = DReg;
3396 if (DReg == SReg) {
3404 TOut.emitRRR(Mips::ROTRV, DReg, SReg, TmpReg, Inst.getLoc(), STI);
3409 TOut.emitRRR(Mips::ROTRV, DReg, SReg, TReg, Inst.getLoc(), STI);
3437 TOut.emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), STI);
3438 TOut.emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), STI);
3451 unsigned DReg = Inst.getOperand(0).getReg(); local
3465 TOut.emitRRI(Mips::ROTR, DReg, SRe
3515 unsigned DReg = Inst.getOperand(0).getReg(); local
3580 unsigned DReg = Inst.getOperand(0).getReg(); local
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| H A D | MBlazeISelLowering.cpp | 1052 SDValue DReg = DAG.getRegister(Reg, MVT::i32); local
1055 return DAG.getNode(Ret, dl, MVT::Other, Chain, DReg, Flag);
1057 return DAG.getNode(Ret, dl, MVT::Other, Chain, DReg);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 1041 unsigned DReg = TRI->getMatchingSuperReg(SrcReg, local
1044 // The lane is [0,1] for the containing DReg superregister.
1047 MIB.addReg(DReg);
|
| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceAssemblerARM32.cpp | 199 IValueT DReg = EncodedQReg << 1; local
200 assert(DReg < RegARM32::getNumDRegs());
201 return DReg;
|