| /external/vixl/examples/aarch64/ |
| H A D | add3-double.cc | 37 __ Fadd(d0, d0, d1); // d0 <- x + y
38 __ Fadd(d0, d0, d2); // d0 <- d0 + z
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| H A D | add4-double.cc | 44 __ Fadd(d0, d0, d1);
45 __ Fadd(d2, d2, d3);
46 __ Fadd(d0, d0, d2);
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| H A D | custom-disassembler.cc | 128 __ Fadd(d30, d16, d17);
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| /external/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 1297 __ Fadd(i.OutputFloat32Register(), i.InputFloat32Register(0),
1332 __ Fadd(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
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| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceConverter.cpp | 297 return convertArithInstruction(Instr, Ice::InstArithmetic::Fadd);
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| H A D | IceTargetLoweringARM32.cpp | 2909 case InstArithmetic::Fadd:
3105 case InstArithmetic::Fadd:
3162 case InstArithmetic::Fadd: {
3510 case InstArithmetic::Fadd:
6959 case InstArithmetic::Fadd:
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| H A D | WasmTranslator.cpp | 412 Control()->appendInst(InstArithmetic::create(Func, InstArithmetic::Fadd,
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| H A D | IceTargetLoweringX86BaseImpl.h | 2057 case InstArithmetic::Fadd:
2193 case InstArithmetic::Fadd: {
2525 case InstArithmetic::Fadd:
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| H A D | IceTargetLoweringMIPS32.cpp | 2734 case InstArithmetic::Fadd:
2993 case InstArithmetic::Fadd: {
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| H A D | PNaClTranslator.cpp | 1764 Op = Ice::InstArithmetic::Fadd;
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| /external/v8/src/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 564 void MacroAssembler::Fadd(const FPRegister& fd, function in class:v8::internal::MacroAssembler
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| H A D | macro-assembler-arm64.h | 395 inline void Fadd(const FPRegister& fd,
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| /external/v8/src/crankshaft/arm64/ |
| H A D | lithium-codegen-arm64.cc | 1656 case Token::ADD: __ Fadd(result, left, right); break;
3666 __ Fadd(double_scratch(), input, fp_zero);
3732 __ Fadd(result, input, scratch_d);
3759 __ Fadd(temp, input, dot_five);
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| /external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 9932 __ Fadd(s0, s17, s18);
9933 __ Fadd(s1, s18, s19);
9934 __ Fadd(s2, s14, s18);
9935 __ Fadd(s3, s15, s18);
9936 __ Fadd(s4, s16, s18);
9937 __ Fadd(s5, s15, s16);
9938 __ Fadd(s6, s16, s15);
9940 __ Fadd(d7, d30, d31);
9941 __ Fadd(d8, d29, d31);
9942 __ Fadd(d
[all...] |
| H A D | test-simulator-aarch64.cc | 4548 __ Fadd(temp, temp, input_1.D());
4549 __ Fadd(result, temp, input_3);
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| H A D | test-disasm-aarch64.cc | 4559 COMPARE_MACRO(Fadd(v0.M, v1.M, v2.M), "fadd v0." S ", v1." S ", v2." S);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2414 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2);
2415 return DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Fadd,
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2595 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2);
2596 return DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Fadd,
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| /external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 1181 void Fadd(const VRegister& vd, const VRegister& vn, const VRegister& vm) { function in class:vixl::aarch64::MacroAssembler
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| /external/swiftshader/src/Reactor/ |
| H A D | SubzeroReactor.cpp | 698 case Ice::InstArithmetic::Fadd:
750 return createArithmetic(Ice::InstArithmetic::Fadd, lhs, rhs);
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