| /external/vixl/examples/aarch64/ |
| H A D | neon-matrix-multiply.cc | 35 // __ Fmul(v<v_out>.V4S(), v4.V4S(), v<s_column>.S(), 0);
51 __ Fmul(v_out, v4.V4S(), v_in, 0); // e.g. (v0.V4S(), v4.V4S(), v8.S(), 0).
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| /external/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 1305 __ Fmul(i.OutputFloat32Register(), i.InputFloat32Register(0),
1340 __ Fmul(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
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| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceConverter.cpp | 301 return convertArithInstruction(Instr, Ice::InstArithmetic::Fmul);
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| H A D | IceTargetLoweringARM32.cpp | 2911 case InstArithmetic::Fmul:
3106 case InstArithmetic::Fmul:
3191 case InstArithmetic::Fmul: {
3512 case InstArithmetic::Fmul:
6944 case InstArithmetic::Fmul:
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| H A D | WasmTranslator.cpp | 432 Control()->appendInst(InstArithmetic::create(Func, InstArithmetic::Fmul,
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| H A D | IceTargetLoweringX86BaseImpl.h | 2059 case InstArithmetic::Fmul:
2205 case InstArithmetic::Fmul: {
2535 case InstArithmetic::Fmul:
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| H A D | IceTargetLoweringMIPS32.cpp | 2736 case InstArithmetic::Fmul:
3018 case InstArithmetic::Fmul:
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| H A D | PNaClTranslator.cpp | 1780 Op = Ice::InstArithmetic::Fmul;
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| /external/v8/src/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 794 void MacroAssembler::Fmul(const FPRegister& fd, function in class:v8::internal::MacroAssembler
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| H A D | macro-assembler-arm64.h | 455 inline void Fmul(const FPRegister& fd,
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| H A D | code-stubs-arm64.cc | 757 __ Fmul(scratch1_double, scratch1_double, scratch1_double);
763 __ Fmul(result_double, result_double, scratch1_double);
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| /external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 1395 void Fmul(const VRegister& vd, const VRegister& vn, const VRegister& vm) { function in class:vixl::aarch64::MacroAssembler
2399 V(fmul, Fmul) \
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| /external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 10045 __ Fmul(s0, s17, s18);
10046 __ Fmul(s1, s18, s19);
10047 __ Fmul(s2, s14, s14);
10048 __ Fmul(s3, s15, s20);
10049 __ Fmul(s4, s16, s20);
10050 __ Fmul(s5, s15, s19);
10051 __ Fmul(s6, s19, s16);
10053 __ Fmul(d7, d30, d31);
10054 __ Fmul(d8, d29, d31);
10055 __ Fmul(d
[all...] |
| H A D | test-disasm-aarch64.cc | 4569 COMPARE_MACRO(Fmul(v6.M, v7.M, v8.M), "fmul v6." S ", v7." S ", v8." S);
4954 COMPARE_MACRO(Fmul(v0.V2S(), v1.V2S(), v2.S(), 0),
4956 COMPARE_MACRO(Fmul(v2.V4S(), v3.V4S(), v15.S(), 3),
4958 COMPARE_MACRO(Fmul(v0.V2D(), v1.V2D(), v2.D(), 0),
4960 COMPARE_MACRO(Fmul(d0, d1, v2.D(), 0), "fmul d0, d1, v2.d[0]");
4961 COMPARE_MACRO(Fmul(s0, s1, v2.S(), 0), "fmul s0, s1, v2.s[0]");
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2411 SDValue Fmul = DAG.getNode(ISD::FMUL, dl, MVT::f64, TwoP32, Fcvt);
2414 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2);
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 2592 SDValue Fmul = DAG.getNode(ISD::FMUL, dl, MVT::f64, TwoP32, Fcvt);
2595 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2);
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| /external/swiftshader/src/Reactor/ |
| H A D | SubzeroReactor.cpp | 700 case Ice::InstArithmetic::Fmul:
760 return createArithmetic(Ice::InstArithmetic::Fmul, lhs, rhs);
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| /external/v8/src/crankshaft/arm64/ |
| H A D | lithium-codegen-arm64.cc | 1658 case Token::MUL: __ Fmul(result, left, right); break;
|