Searched refs:Ins (Results 1 - 25 of 118) sorted by relevance

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/external/llvm/lib/Target/PowerPC/
H A DPPCCCState.cpp28 const SmallVectorImpl<ISD::InputArg> &Ins) {
29 for (const auto &I : Ins) {
27 PreAnalyzeFormalArguments( const SmallVectorImpl<ISD::InputArg> &Ins) argument
H A DPPCCCState.h25 PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
/external/llvm/lib/Target/Mips/
H A DMipsCCState.h33 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
50 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
93 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument
95 PreAnalyzeFormalArgumentsForF128(Ins);
96 CCState::AnalyzeFormalArguments(Ins, Fn);
101 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument
104 PreAnalyzeCallResultForF128(Ins, CLI);
105 CCState::AnalyzeCallResult(Ins, Fn);
H A DMipsCCState.cpp75 const SmallVectorImpl<ISD::InputArg> &Ins,
77 for (unsigned i = 0; i < Ins.size(); ++i) {
115 const SmallVectorImpl<ISD::InputArg> &Ins) {
117 for (unsigned i = 0; i < Ins.size(); ++i) {
123 if (Ins[i].Flags.isSRet()) {
129 assert(Ins[i].getOrigArgIndex() < MF.getFunction()->arg_size());
130 std::advance(FuncArg, Ins[i].getOrigArgIndex());
74 PreAnalyzeCallResultForF128( const SmallVectorImpl<ISD::InputArg> &Ins, const TargetLowering::CallLoweringInfo &CLI) argument
114 PreAnalyzeFormalArgumentsForF128( const SmallVectorImpl<ISD::InputArg> &Ins) argument
/external/llvm/lib/Transforms/Scalar/
H A DStraightLineStrengthReduce.cpp93 Stride(nullptr), Ins(nullptr), Basis(nullptr) {}
96 : CandidateKind(CT), Base(B), Index(Idx), Stride(S), Ins(I),
119 Instruction *Ins; member in struct:__anon14774::StraightLineStrengthReduce::Candidate
226 return (Basis.Ins != C.Ins && // skip the same instruction
229 Basis.Ins->getType() == C.Ins->getType() &&
231 DT->dominates(Basis.Ins->getParent(), C.Ins->getParent()) &&
261 return isGEPFoldable(cast<GetElementPtrInst>(C.Ins), TT
[all...]
/external/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h45 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument
49 for (unsigned i = 0; i < Ins.size(); ++i)
53 for (unsigned i = 0; i < Ins.size(); ++i)
54 ArgIsShortVector.push_back(IsShortVectorType(Ins[i].ArgVT));
56 CCState::AnalyzeFormalArguments(Ins, Fn);
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
H A DPTXISelLowering.cpp194 const SmallVectorImpl<ISD::InputArg> &Ins,
222 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
223 assert((!MFI->isKernel() || Ins[i].VT != MVT::i1) &&
226 unsigned ParamSize = Ins[i].VT.getStoreSizeInBits();
231 SDValue ArgValue = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain,
237 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
238 EVT RegVT = Ins[i].VT;
350 const SmallVectorImpl<ISD::InputArg> &Ins,
362 // The layout of the ops will be [Chain, #Ins, Ins, Calle
191 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
345 LowerCall(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool &isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...]
H A DPTXISelLowering.h52 const SmallVectorImpl<ISD::InputArg> &Ins,
72 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/CodeGen/
H A DCallingConvLower.cpp70 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument
72 unsigned NumArgs = Ins.size();
75 MVT ArgVT = Ins[i].VT;
76 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument
159 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
160 MVT VT = Ins[i].VT;
161 ISD::ArgFlagsTy Flags = Ins[i].Flags;
256 const SmallVectorImpl<ISD::InputArg> &Ins,
262 CCInfo1.AnalyzeCallResult(Ins, CalleeF
[all...]
/external/llvm/include/llvm/Transforms/
H A DInstrProfiling.h67 void computeNumValueSiteCounts(InstrProfValueProfileInst *Ins);
70 void lowerValueProfileInst(InstrProfValueProfileInst *Ins);
/external/swiftshader/third_party/LLVM/lib/CodeGen/
H A DCallingConvLower.cpp69 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument
71 unsigned NumArgs = Ins.size();
74 MVT ArgVT = Ins[i].VT;
75 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument
159 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
160 MVT VT = Ins[i].VT;
161 ISD::ArgFlagsTy Flags = Ins[i].Flags;
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
H A DSystemZISelLowering.h99 const SmallVectorImpl<ISD::InputArg> &Ins,
106 const SmallVectorImpl<ISD::InputArg> &Ins,
113 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
128 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
H A DAlphaISelLowering.h86 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
129 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h114 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
126 const SmallVectorImpl<ISD::InputArg> &Ins,
135 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h136 const SmallVectorImpl<ISD::InputArg> &Ins,
142 const SmallVectorImpl<ISD::InputArg> &Ins,
148 const SmallVectorImpl<ISD::InputArg> &Ins,
154 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
H A DMipsISelLowering.h89 Ins enumerator in enum:llvm::MipsISD::NodeType
123 const SmallVectorImpl<ISD::InputArg> &Ins,
145 const SmallVectorImpl<ISD::InputArg> &Ins,
155 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Target/BPF/
H A DBPFISelLowering.h57 const SmallVectorImpl<ISD::InputArg> &Ins,
71 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
H A DBlackfinISelLowering.h62 const SmallVectorImpl<ISD::InputArg> &Ins,
70 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
H A DSparcISelLowering.h75 const SmallVectorImpl<ISD::InputArg> &Ins,
85 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
H A DPPCISelLowering.h375 const SmallVectorImpl<ISD::InputArg> &Ins,
418 const SmallVectorImpl<ISD::InputArg> &Ins,
429 const SmallVectorImpl<ISD::InputArg> &Ins,
435 const SmallVectorImpl<ISD::InputArg> &Ins,
444 const SmallVectorImpl<ISD::InputArg> &Ins,
464 const SmallVectorImpl<ISD::InputArg> &Ins,
470 const SmallVectorImpl<ISD::InputArg> &Ins,
479 const SmallVectorImpl<ISD::InputArg> &Ins,
487 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
H A DMSP430ISelLowering.h130 const SmallVectorImpl<ISD::InputArg> &Ins,
137 const SmallVectorImpl<ISD::InputArg> &Ins,
144 const SmallVectorImpl<ISD::InputArg> &Ins,
151 const SmallVectorImpl<ISD::InputArg> &Ins,
159 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Target/XCore/
H A DXCoreISelLowering.h114 const SmallVectorImpl<ISD::InputArg> &Ins,
122 const SmallVectorImpl<ISD::InputArg> &Ins,
127 const SmallVectorImpl<ISD::InputArg> &Ins,
173 const SmallVectorImpl<ISD::InputArg> &Ins,
183 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Transforms/IPO/
H A DPartialInlining.cpp100 Instruction *Ins = &newReturnBlock->front(); local
105 PHINode *retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins);
107 Ins = newReturnBlock->getFirstNonPHI();
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
H A DMBlazeISelLowering.h115 const SmallVectorImpl<ISD::InputArg> &Ins,
130 const SmallVectorImpl<ISD::InputArg> &Ins,
140 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/swiftshader/third_party/LLVM/lib/Transforms/IPO/
H A DPartialInlining.cpp93 BasicBlock::iterator Ins = newReturnBlock->begin(); local
98 PHINode* retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins);
100 Ins = newReturnBlock->getFirstNonPHI();

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