| /external/llvm/test/MC/ARM/ |
| H A D | thumbv8m.s | 198 MRS r1, MSP_NS label
202 MRS r3, PRIMASK_NS label
206 MRS r5, SP_NS label
208 MRS r6,MSPLIM label
210 MRS r7,PSPLIM label
217 MRS r10, MSPLIM_NS label
223 MRS r12, BASEPRI_NS label
226 MRS r12, BASEPRI_MAX_NS label
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| H A D | thumbv7m.s | 10 @ MRS
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| H A D | thumb2-mclass.s | 10 @ MRS
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| H A D | basic-arm-instructions.s | 1408 @ MRS
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| H A D | basic-thumb2-instructions.s | 1545 @ MRS
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| H A D | thumb2-mclass.s | 9 @ MRS
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| H A D | basic-arm-instructions.s | 896 @ MRS
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| H A D | basic-thumb2-instructions.s | 1162 @ MRS
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| /external/v8/src/arm64/ |
| H A D | disasm-arm64.cc | 1166 case MRS: {
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| H A D | constants-arm64.h | 196 /* System (MRS, MSR) */ \
660 MRS = SystemSysRegFixed | 0x00200000, enumerator in enum:v8::internal::SystemSysRegOp
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| H A D | assembler-arm64.cc | 1794 Emit(MRS | ImmSystemRegister(sysreg) | Rt(rt));
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| H A D | simulator-arm64.cc | 3246 case MRS: {
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| /external/capstone/bindings/ocaml/ |
| H A D | arm64_const.ml | 46 (* System registers for MRS *)
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| /external/llvm/test/MC/AArch64/ |
| H A D | arm64-system-encoding.s | 58 ; MSR/MRS instructions
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| /external/vixl/src/aarch64/ |
| H A D | constants-aarch64.h | 132 /* System (MRS, MSR, SYS) */ \
700 MRS = SystemSysRegFixed | 0x00200000, enumerator in enum:vixl::aarch64::SystemSysRegOp
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| H A D | disasm-aarch64.cc | 1741 case MRS: {
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| H A D | simulator-aarch64.cc | 2888 case MRS: {
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| H A D | assembler-aarch64.cc | 2051 Emit(MRS | ImmSystemRegister(sysreg) | Rt(xt));
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2392 // into a single value to be used in the MRS/MSR instruction.
2416 // based on the bit encoding of MRS/MSR instruction.
2421 // Lower the read_register intrinsic to an MRS instruction node if the special
2424 // known by the MRS SysReg mapper.
2433 AArch64::MRS, DL, N->getSimpleValueType(0), MVT::Other,
2450 AArch64::MRS, DL, N->getSimpleValueType(0), MVT::Other,
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| H A D | AArch64InstrInfo.cpp | 2168 BuildMI(MBB, I, DL, get(AArch64::MRS), DestReg)
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| /external/capstone/arch/ARM/ |
| H A D | ARMGenAsmWriter.inc | 251 35327U, // MRS
3044 2U, // MRS
7103 // MRS, t2MRS_AR
8953 // (MRS GPRnopc:$Rd, pred:$p)
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| H A D | ARMGenInstrInfo.inc | 3428 { 234, 3, 1, 0, 4, 0|(1<<MCID_Predicable)|(1<<MCID_UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo90,0,nullptr }, // Inst #234 = MRS
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| /external/capstone/arch/AArch64/ |
| H A D | AArch64GenAsmWriter.inc | 1137 201599116U, // MRS
3529 0U, // MRS
5820 // MRS
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 683 : ARM::MRS;
688 // There is only 1 A/R class MRS instruction, and it always refers to
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| H A D | ARMISelDAGToDAG.cpp | 4057 ReplaceNode(N, CurDAG->getMachineNode(IsThumb2 ? ARM::t2MRS_AR : ARM::MRS,
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