| /external/vixl/test/aarch32/ |
| H A D | test-macro-assembler-cond-rd-rn-a32.cc | 57 M(Rbit) \
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| H A D | test-macro-assembler-cond-rd-rn-t32.cc | 57 M(Rbit) \
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| H A D | test-simulator-cond-rd-rn-a32.cc | 117 M(Rbit) \
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| H A D | test-simulator-cond-rd-rn-t32.cc | 117 M(Rbit) \
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| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 411 Rbit, enumerator in enum:Ice::ARM32::InstARM32::InstKindARM32
1056 using InstARM32Rbit = InstARM32UnaryopGPR<InstARM32::Rbit, false>;
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| H A D | IceInstARM32.cpp | 3528 template class InstARM32UnaryopGPR<InstARM32::Rbit, false>;
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| /external/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 1263 __ Rbit(i.OutputRegister64(), i.InputRegister64(0));
1266 __ Rbit(i.OutputRegister32(), i.InputRegister32(0));
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| /external/v8/src/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 1007 void MacroAssembler::Rbit(const Register& rd, const Register& rn) { function in class:v8::internal::MacroAssembler
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| H A D | macro-assembler-arm64.h | 505 inline void Rbit(const Register& rd, const Register& rn);
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| /external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 1729 void Rbit(const Register& rd, const Register& rn) { function in class:vixl::aarch64::MacroAssembler
2338 V(rbit, Rbit) \
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| /external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 3051 void Rbit(Condition cond, Register rd, Register rm) { function in class:vixl::aarch32::MacroAssembler
3060 void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); } function in class:vixl::aarch32::MacroAssembler
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| /external/vixl/test/aarch64/ |
| H A D | test-disasm-aarch64.cc | 5947 COMPARE_MACRO(Rbit(v1.V8B(), v8.V8B()),
5950 COMPARE_MACRO(Rbit(v2.V16B(), v9.V16B()),
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| H A D | test-assembler-aarch64.cc | 1727 __ Rbit(w0, w24);
1728 __ Rbit(x1, x24);
19423 __ Rbit(v28.V8B(), v1.V8B());
19424 __ Rbit(v29.V16B(), v1.V16B());
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