| /external/llvm/test/MC/AArch64/ |
| H A D | neon-3vdiff.s | 369 addhn v0.8b, v1.8h, v2.8h
370 addhn v0.4h, v1.4s, v2.4s
371 addhn v0.2s, v1.2d, v2.2d
373 // CHECK: addhn v0.8b, v1.8h, v2.8h // encoding: [0x20,0x40,0x22,0x0e]
374 // CHECK: addhn v0.4h, v1.4s, v2.4s // encoding: [0x20,0x40,0x62,0x0e]
375 // CHECK: addhn v0.2s, v1.2d, v2.2d // encoding: [0x20,0x40,0xa2,0x0e]
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| H A D | arm64-advsimd.s | 39 addhn.8b v0, v0, v0
41 addhn.4h v0, v0, v0
43 addhn.2s v0, v0, v0
46 ; CHECK: addhn.8b v0, v0, v0 ; encoding: [0x00,0x40,0x20,0x0e]
48 ; CHECK: addhn.4h v0, v0, v0 ; encoding: [0x00,0x40,0x60,0x0e]
50 ; CHECK: addhn.2s v0, v0, v0 ; encoding: [0x00,0x40,0xa0,0x0e]
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| H A D | neon-diagnostics.s | 2763 addhn v0.8b, v1.8h, v2.8d
2764 addhn v0.4h, v1.4s, v2.4h
2765 addhn v0.2s, v1.2d, v2.2s
2768 // CHECK-ERROR: addhn v0.8b, v1.8h, v2.8d
2771 // CHECK-ERROR: addhn v0.4h, v1.4s, v2.4h
2774 // CHECK-ERROR: addhn v0.2s, v1.2d, v2.2s
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| /external/capstone/suite/MC/AArch64/ |
| H A D | neon-3vdiff.s.cs | 126 0x20,0x40,0x22,0x0e = addhn v0.8b, v1.8h, v2.8h
127 0x20,0x40,0x62,0x0e = addhn v0.4h, v1.4s, v2.4s
128 0x20,0x40,0xa2,0x0e = addhn v0.2s, v1.2d, v2.2d
|
| /external/valgrind/none/tests/arm64/ |
| H A D | fp_and_simd.c | 2716 GEN_BINARY_TEST(addhn, 2s, 2d, 2d)
2718 GEN_BINARY_TEST(addhn, 4h, 4s, 4s)
2720 GEN_BINARY_TEST(addhn, 8b, 8h, 8h)
5364 // addhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h
7430 addhn 2s.2d.2d, 4s.2d.2d, h_from_s and b_from_h (add and get high half)
8382 addhn{2} 2s/4s_2d_2d, 4h/8h_4s_4s, 8b/16b_8h_8h
|
| H A D | fp_and_simd.stdout.exp | 26947 addhn v9.2s, v7.2d, v8.2d f17a5fa50e8c4ea360753ff4b3136416 8b4f68a2d06b77faad1aa7687bf0734a 00000000000000007cc9c8470d8fe75d fpsr=00000000
26949 addhn v9.4h, v7.4s, v8.4s f4b97b2003b134783ff7bfea289b6d2d ca0e41c80df3d06fa23573265b5d8647 0000000000000000bec711a5e22d83f8 fpsr=00000000
26951 addhn v9.8b, v7.8h, v8.8h 750d85ba4d0b5b78e0c7aa4ee70264af 1c112f0bd4fe302d310d1191fa368d0d 000000000000000091b4228b11bbe1f1 fpsr=00000000
[all...] |
| /external/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 630 __ addhn(v10.V2S(), v14.V2D(), v15.V2D());
631 __ addhn(v10.V4H(), v30.V4S(), v26.V4S());
632 __ addhn(v31.V8B(), v12.V8H(), v22.V8H());
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| H A D | test-simulator-aarch64.cc | 4192 DEFINE_TEST_NEON_3DIFF_NARROW(addhn, Basic)
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| /external/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 2434 void addhn(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| H A D | macro-assembler-aarch64.h | 2160 V(addhn, Addhn) \
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| H A D | simulator-aarch64.h | 2728 V(addhn) \
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| H A D | simulator-aarch64.cc | 3652 addhn(vf, rd, rn, rm);
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| H A D | assembler-aarch64.cc | 1948 V(addhn, NEON_ADDHN, vd.IsD()) \
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| H A D | logic-aarch64.cc | 3365 LogicVRegister Simulator::addhn(VectorFormat vform, function in class:vixl::aarch64::Simulator
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