Searched refs:inst (Results 1 - 25 of 552) sorted by relevance

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/external/llvm/test/MC/AArch64/
H A Dinst-directive-diagnostic.s9 .inst
12 .inst 0x5e104020,
15 .inst .Label
18 .inst 0x5e104020 0x5e104020
H A Dinst-directive.s13 .section .inst.aarch64_inst
19 .inst 0x5e104020
25 // CHECK-ASM: .inst 0x5e104020
28 // CHECK-OBJ: Name: .inst.aarch64_inst
33 // CHECK-SYMS-NOT: 0000000000000000 .inst.aarch64_inst 00000000 $d
34 // CHECK-SYMS: 0000000000000000 .inst.aarch64_inst 00000000 $x
35 // CHECK-SYMS-NOT: 0000000000000000 .inst.aarch64_inst 00000000 $d
/external/webrtc/webrtc/modules/audio_coding/codecs/isac/main/source/
H A Disac_float_type.h21 static inline int16_t Control(instance_type* inst, argument
24 return WebRtcIsac_Control(inst, rate, framesize);
26 static inline int16_t ControlBwe(instance_type* inst, argument
30 return WebRtcIsac_ControlBwe(inst, rate_bps, frame_size_ms,
33 static inline int16_t Create(instance_type** inst) { argument
34 return WebRtcIsac_Create(inst);
36 static inline int DecodeInternal(instance_type* inst, argument
41 return WebRtcIsac_Decode(inst, encoded, len, decoded, speech_type);
43 static inline size_t DecodePlc(instance_type* inst, argument
46 return WebRtcIsac_DecodePlc(inst, decode
49 DecoderInit(instance_type* inst) argument
52 Encode(instance_type* inst, const int16_t* speech_in, uint8_t* encoded) argument
57 EncoderInit(instance_type* inst, int16_t coding_mode) argument
60 EncSampRate(instance_type* inst) argument
64 Free(instance_type* inst) argument
67 GetBandwidthInfo(instance_type* inst, IsacBandwidthInfo* bwinfo) argument
71 GetErrorCode(instance_type* inst) argument
75 GetNewFrameLen(instance_type* inst) argument
78 SetBandwidthInfo(instance_type* inst, const IsacBandwidthInfo* bwinfo) argument
82 SetDecSampRate(instance_type* inst, uint16_t sample_rate_hz) argument
86 SetEncSampRate(instance_type* inst, uint16_t sample_rate_hz) argument
90 SetEncSampRateInDecoder(instance_type* inst, uint16_t sample_rate_hz) argument
94 SetInitialBweBottleneck(instance_type* inst, int bottleneck_bits_per_second) argument
98 UpdateBwEstimate(instance_type* inst, const uint8_t* encoded, size_t packet_size, uint16_t rtp_seq_number, uint32_t send_ts, uint32_t arr_ts) argument
107 SetMaxPayloadSize(instance_type* inst, int16_t max_payload_size_bytes) argument
111 SetMaxRate(instance_type* inst, int32_t max_bit_rate) argument
[all...]
/external/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_asm.c36 check_uniforms(const struct etna_inst *inst) argument
43 const struct etna_inst_src *src = &inst->src[i];
62 etna_assemble(uint32_t *out, const struct etna_inst *inst) argument
65 if (inst->imm && inst->src[2].use)
68 if (!check_uniforms(inst))
71 out[0] = VIV_ISA_WORD_0_OPCODE(inst->opcode) |
72 VIV_ISA_WORD_0_COND(inst->cond) |
73 COND(inst->sat, VIV_ISA_WORD_0_SAT) |
74 COND(inst
[all...]
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_fs_lower_pack.cpp35 foreach_block_and_inst_safe(block, fs_inst, inst, cfg) {
36 if (inst->opcode != FS_OPCODE_PACK)
39 assert(inst->dst.file == VGRF);
40 assert(inst->saturate == false);
41 fs_reg dst = inst->dst;
43 const fs_builder ibld(this, block, inst);
44 for (unsigned i = 0; i < inst->sources; i++)
45 ibld.MOV(subscript(dst, inst->src[i].type, i), inst->src[i]);
47 inst
[all...]
H A Dbrw_fs_lower_d2x.cpp35 foreach_block_and_inst_safe(block, fs_inst, inst, cfg) {
36 if (inst->opcode != BRW_OPCODE_MOV)
39 if (inst->dst.type != BRW_REGISTER_TYPE_F &&
40 inst->dst.type != BRW_REGISTER_TYPE_D &&
41 inst->dst.type != BRW_REGISTER_TYPE_UD)
44 if (inst->src[0].type != BRW_REGISTER_TYPE_DF)
47 assert(inst->dst.file == VGRF);
48 assert(inst->saturate == false);
49 fs_reg dst = inst->dst;
51 const fs_builder ibld(this, block, inst);
[all...]
H A Dbrw_vec4_cmod_propagation.cpp44 foreach_inst_in_block_reverse_safe(vec4_instruction, inst, block) {
47 if ((inst->opcode != BRW_OPCODE_AND &&
48 inst->opcode != BRW_OPCODE_CMP &&
49 inst->opcode != BRW_OPCODE_MOV) ||
50 inst->predicate != BRW_PREDICATE_NONE ||
51 !inst->dst.is_null() ||
52 inst->src[0].file != VGRF ||
53 inst->src[0].abs)
56 if (inst->opcode == BRW_OPCODE_AND &&
57 !(inst
[all...]
H A Dbrw_fs_cmod_propagation.cpp57 foreach_inst_in_block_reverse_safe(fs_inst, inst, block) {
60 if ((inst->opcode != BRW_OPCODE_AND &&
61 inst->opcode != BRW_OPCODE_CMP &&
62 inst->opcode != BRW_OPCODE_MOV) ||
63 inst->predicate != BRW_PREDICATE_NONE ||
64 !inst->dst.is_null() ||
65 inst->src[0].file != VGRF ||
66 inst->src[0].abs)
76 if (inst->opcode == BRW_OPCODE_AND &&
77 !(inst
[all...]
H A Dbrw_fs_dead_code_eliminate.cpp41 can_eliminate(const fs_inst *inst, BITSET_WORD *flag_live) argument
43 return !inst->is_control_flow() &&
44 !inst->has_side_effects() &&
45 !(flag_live[0] & inst->flags_written()) &&
46 !inst->writes_accumulator;
53 can_omit_write(const fs_inst *inst) argument
55 switch (inst->opcode) {
65 if (inst->opcode < 128 && inst->mlen == 0)
90 foreach_inst_in_block_reverse_safe(fs_inst, inst, bloc
[all...]
H A Dbrw_fs_validate.cpp36 dump_instruction(inst, stderr); \
44 foreach_block_and_inst (block, fs_inst, inst, cfg) {
45 if (inst->dst.file == VGRF) {
46 fsv_assert(inst->dst.offset / REG_SIZE + regs_written(inst) <=
47 alloc.sizes[inst->dst.nr]);
50 for (unsigned i = 0; i < inst->sources; i++) {
51 if (inst->src[i].file == VGRF) {
52 fsv_assert(inst->src[i].offset / REG_SIZE + regs_read(inst,
[all...]
H A Dbrw_vec4_copy_propagation.cpp44 is_direct_copy(vec4_instruction *inst) argument
46 return (inst->opcode == BRW_OPCODE_MOV &&
47 !inst->predicate &&
48 inst->dst.file == VGRF &&
49 inst->dst.offset % REG_SIZE == 0 &&
50 !inst->dst.reladdr &&
51 !inst->src[0].reladdr &&
52 (inst->dst.type == inst->src[0].type ||
53 (inst
58 is_dominated_by_previous_instruction(vec4_instruction *inst) argument
67 is_channel_updated(vec4_instruction *inst, src_reg *values[4], int ch) argument
135 try_constant_propagate(const struct gen_device_info *devinfo, vec4_instruction *inst, int arg, const copy_entry *entry) argument
309 try_copy_propagate(const struct gen_device_info *devinfo, vec4_instruction *inst, int arg, const copy_entry *entry, int attributes_per_reg) argument
[all...]
/external/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_opt_algebraic.c41 dump_from(struct vc4_compile *c, struct qinst *inst) argument
47 qir_dump_inst(c, inst);
52 dump_to(struct vc4_compile *c, struct qinst *inst) argument
58 qir_dump_inst(c, inst);
94 replace_with_mov(struct vc4_compile *c, struct qinst *inst, struct qreg arg) argument
96 dump_from(c, inst);
98 inst->src[0] = arg;
99 if (qir_has_implicit_tex_uniform(inst))
100 inst->src[1] = inst
112 replace_x_0_with_x(struct vc4_compile *c, struct qinst *inst, int arg) argument
123 replace_x_0_with_0(struct vc4_compile *c, struct qinst *inst, int arg) argument
134 fmul_replace_one(struct vc4_compile *c, struct qinst *inst, int arg) argument
[all...]
H A Dvc4_qpu_validate.c28 fail_instr(uint64_t inst, const char *msg) argument
31 vc4_qpu_disasm(&inst, 1);
37 writes_reg(uint64_t inst, uint32_t w) argument
39 return (QPU_GET_FIELD(inst, QPU_WADDR_ADD) == w ||
40 QPU_GET_FIELD(inst, QPU_WADDR_MUL) == w);
44 _reads_reg(uint64_t inst, uint32_t r, bool ignore_a, bool ignore_b) argument
49 { QPU_GET_FIELD(inst, QPU_ADD_A) },
50 { QPU_GET_FIELD(inst, QPU_ADD_B) },
51 { QPU_GET_FIELD(inst, QPU_MUL_A) },
52 { QPU_GET_FIELD(inst, QPU_MUL_
82 reads_reg(uint64_t inst, uint32_t r) argument
88 reads_a_reg(uint64_t inst, uint32_t r) argument
94 reads_b_reg(uint64_t inst, uint32_t r) argument
100 writes_sfu(uint64_t inst) argument
127 uint64_t inst = insts[i]; local
200 uint64_t inst = insts[i]; local
213 uint64_t inst = insts[i]; local
229 uint64_t inst = insts[i]; local
257 uint64_t inst = insts[i]; local
273 uint64_t inst = insts[i]; local
330 uint64_t inst = insts[i]; local
346 uint64_t inst = insts[i]; local
359 uint64_t inst = insts[i]; local
382 uint64_t inst = insts[i]; local
[all...]
H A Dvc4_opt_coalesce_ff_writes.c45 qir_for_each_inst_inorder(inst, c) {
46 for (int i = 0; i < qir_get_nsrc(inst); i++) {
47 if (inst->src[i].file == QFILE_TEMP) {
48 uint32_t temp = inst->src[i].index;
67 struct qinst *inst = c->defs[temp]; local
68 if (!inst)
75 if (qir_is_tex(mov_inst) && qir_has_uniform_read(inst))
78 if (qir_depends_on_flags(inst) || inst->sf)
81 if (qir_has_side_effects(c, inst) ||
[all...]
H A Dvc4_opt_dead_code.c43 dce(struct vc4_compile *c, struct qinst *inst) argument
47 qir_dump_inst(c, inst);
50 assert(!inst->sf);
51 qir_remove_instruction(c, inst);
55 has_nonremovable_reads(struct vc4_compile *c, struct qinst *inst) argument
57 for (int i = 0; i < qir_get_nsrc(inst); i++) {
58 if (inst->src[i].file == QFILE_VPM) {
59 uint32_t attr = inst->src[i].index / 4;
60 uint32_t offset = (inst->src[i].index % 4) * 4;
75 if (inst
[all...]
H A Dvc4_qir_validate.c28 fail_instr(struct vc4_compile *c, struct qinst *inst, const char *msg) argument
31 qir_dump_inst(c, inst);
56 qir_for_each_inst_inorder(inst, c) {
57 switch (inst->dst.file) {
59 if (inst->dst.index >= c->num_temps)
60 fail_instr(c, inst, "bad temp index");
62 if (c->defs[inst->dst.index] &&
63 already_assigned[inst->dst.index]) {
64 fail_instr(c, inst, "Re-assignment of SSA value");
66 already_assigned[inst
[all...]
H A Dvc4_qpu.c33 set_src_raddr(uint64_t inst, struct qpu_reg src) argument
36 assert(QPU_GET_FIELD(inst, QPU_RADDR_A) == QPU_R_NOP ||
37 QPU_GET_FIELD(inst, QPU_RADDR_A) == src.addr);
38 return QPU_UPDATE_FIELD(inst, src.addr, QPU_RADDR_A);
42 assert((QPU_GET_FIELD(inst, QPU_RADDR_B) == QPU_R_NOP ||
43 QPU_GET_FIELD(inst, QPU_RADDR_B) == src.addr) &&
44 QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_SMALL_IMM);
45 return QPU_UPDATE_FIELD(inst, src.addr, QPU_RADDR_B);
49 if (QPU_GET_FIELD(inst, QPU_SIG) == QPU_SIG_SMALL_IMM) {
50 assert(QPU_GET_FIELD(inst, QPU_RADDR_
65 uint64_t inst = 0; local
83 uint64_t inst = 0; local
100 uint64_t inst = 0; local
117 uint64_t inst = 0; local
136 uint64_t inst = 0; local
155 uint64_t inst = 0; local
184 uint64_t inst = 0; local
199 uint64_t inst = 0; local
220 uint64_t inst = 0; local
240 uint64_t inst = 0; local
268 qpu_num_sf_accesses(uint64_t inst) argument
405 convert_mov(uint64_t *inst) argument
445 writes_a_file(uint64_t inst) argument
454 reads_r4(uint64_t inst) argument
636 qpu_set_sig(uint64_t inst, uint32_t sig) argument
643 qpu_set_cond_add(uint64_t inst, uint32_t cond) argument
650 qpu_set_cond_mul(uint64_t inst, uint32_t cond) argument
670 qpu_inst_is_tlb(uint64_t inst) argument
731 qpu_serialize_one_inst(struct vc4_compile *c, uint64_t inst) argument
[all...]
/external/webrtc/webrtc/modules/audio_coding/codecs/isac/fix/source/
H A Disac_fix_type.h23 static inline int16_t Control(instance_type* inst, argument
26 return WebRtcIsacfix_Control(inst, rate, framesize);
28 static inline int16_t ControlBwe(instance_type* inst, argument
32 return WebRtcIsacfix_ControlBwe(inst, rate_bps, frame_size_ms,
35 static inline int16_t Create(instance_type** inst) { argument
36 return WebRtcIsacfix_Create(inst);
38 static inline int DecodeInternal(instance_type* inst, argument
43 return WebRtcIsacfix_Decode(inst, encoded, len, decoded, speech_type);
45 static inline size_t DecodePlc(instance_type* inst, argument
48 return WebRtcIsacfix_DecodePlc(inst, decode
50 DecoderInit(instance_type* inst) argument
53 Encode(instance_type* inst, const int16_t* speech_in, uint8_t* encoded) argument
58 EncoderInit(instance_type* inst, int16_t coding_mode) argument
61 EncSampRate(instance_type* inst) argument
65 Free(instance_type* inst) argument
68 GetBandwidthInfo(instance_type* inst, IsacBandwidthInfo* bwinfo) argument
72 GetErrorCode(instance_type* inst) argument
76 GetNewFrameLen(instance_type* inst) argument
79 SetBandwidthInfo(instance_type* inst, const IsacBandwidthInfo* bwinfo) argument
83 SetDecSampRate(instance_type* inst, uint16_t sample_rate_hz) argument
88 SetEncSampRate(instance_type* inst, uint16_t sample_rate_hz) argument
93 SetEncSampRateInDecoder(instance_type* inst, uint16_t sample_rate_hz) argument
97 SetInitialBweBottleneck(instance_type* inst, int bottleneck_bits_per_second) argument
101 UpdateBwEstimate(instance_type* inst, const uint8_t* encoded, size_t packet_size, uint16_t rtp_seq_number, uint32_t send_ts, uint32_t arr_ts) argument
110 SetMaxPayloadSize(instance_type* inst, int16_t max_payload_size_bytes) argument
114 SetMaxRate(instance_type* inst, int32_t max_bit_rate) argument
[all...]
/external/mesa3d/src/gallium/drivers/ilo/shader/
H A Dtoy_optimize.c38 struct toy_inst *inst; local
41 while ((inst = tc_next(tc)) != NULL) {
42 switch (inst->opcode) {
55 if (tdst_is_null(inst->dst) || !inst->dst.writemask) {
57 if ((inst->opcode == GEN6_OPCODE_MATH ||
58 inst->cond_modifier == GEN6_COND_NONE) &&
59 !inst->acc_wr_ctrl)
60 tc_discard_inst(tc, inst);
/external/clang/test/Index/
H A Dcursor-ref-names.cpp17 Sub inst; local
18 inst.func();
19 inst[1];
20 inst.operator[](1);
22 inst.Base<int>::operator[](1);
30 // CHECK: cursor-ref-names.cpp:17:9: VarDecl=inst:17:9 (Definition) Extent=[17:5 - 17:13]
35 // CHECK: cursor-ref-names.cpp:18:5: DeclRefExpr=inst:17:9 Extent=[18:5 - 18:9]
37 // CHECK: cursor-ref-names.cpp:19:5: DeclRefExpr=inst:17:9 Extent=[19:5 - 19:9]
41 // CHECK: cursor-ref-names.cpp:20:5: DeclRefExpr=inst:17:9 Extent=[20:5 - 20:9]
44 // CHECK: cursor-ref-names.cpp:22:5: DeclRefExpr=inst
[all...]
/external/webrtc/webrtc/modules/audio_processing/ns/
H A Dnsx_core.c164 // if (gain <= inst->denoiseBound) {
165 // factor2 = 1.0 - 0.3 * (blim - inst->denoiseBound);
238 // sum of log2(i) from table index to inst->anaLen2 in Q5
252 // sum of log2(i)^2 from table index to inst->anaLen2 in Q2
303 static void UpdateNoiseEstimate(NoiseSuppressionFixedC* inst, int offset) { argument
311 tmp16 = WebRtcSpl_MaxValueW16(inst->noiseEstLogQuantile + offset,
312 inst->magnLen);
314 inst->qNoise = 14 - (int) WEBRTC_SPL_MUL_16_16_RSFT_WITH_ROUND(
316 for (i = 0; i < inst->magnLen; i++) {
317 // inst
334 NoiseEstimationC(NoiseSuppressionFixedC* inst, uint16_t* magn, uint32_t* noise, int16_t* q_noise) argument
456 PrepareSpectrumC(NoiseSuppressionFixedC* inst, int16_t* freq_buf) argument
477 DenormalizeC(NoiseSuppressionFixedC* inst, int16_t* in, int factor) argument
491 SynthesisUpdateC(NoiseSuppressionFixedC* inst, int16_t* out_frame, int16_t gain_factor) argument
523 AnalysisUpdateC(NoiseSuppressionFixedC* inst, int16_t* out, int16_t* new_speech) argument
542 NormalizeRealBufferC(NoiseSuppressionFixedC* inst, const int16_t* in, int16_t* out) argument
583 WebRtcNsx_CalcParametricNoiseEstimate(NoiseSuppressionFixedC* inst, int16_t pink_noise_exp_avg, int32_t pink_noise_num_avg, int freq_index, uint32_t* noise_estimate, uint32_t* noise_estimate_avg) argument
628 WebRtcNsx_InitCore(NoiseSuppressionFixedC* inst, uint32_t fs) argument
783 WebRtcNsx_set_policy_core(NoiseSuppressionFixedC* inst, int mode) argument
818 WebRtcNsx_FeatureParameterExtraction(NoiseSuppressionFixedC* inst, int flag) argument
1019 WebRtcNsx_ComputeSpectralFlatness(NoiseSuppressionFixedC* inst, uint16_t* magn) argument
1088 WebRtcNsx_ComputeSpectralDifference(NoiseSuppressionFixedC* inst, uint16_t* magnIn) argument
1182 WebRtcNsx_DataAnalysis(NoiseSuppressionFixedC* inst, short* speechFrame, uint16_t* magnU16) argument
1420 WebRtcNsx_DataSynthesis(NoiseSuppressionFixedC* inst, short* outFrame) argument
1500 WebRtcNsx_ProcessCore(NoiseSuppressionFixedC* inst, const short* const* speechFrame, int num_bands, short* const* outFrame) argument
[all...]
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dr500_fragprog.c65 struct rc_instruction * inst; local
85 for (inst = writer->Inst; inst != inst_if; inst = inst->Next) {
87 rc_get_opcode_info(inst->U.I.Opcode);
374 uint32_t inst; local
380 inst0 = inst = code->inst[n].inst0;
381 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
[all...]
H A Dradeon_program.c57 struct rc_instruction * inst = c->Program.Instructions.Next; local
59 while(inst != &c->Program.Instructions) {
60 struct rc_instruction * current = inst;
63 inst = inst->Next;
81 struct rc_instruction * inst,
109 struct rc_instruction * inst; local
114 for(inst = c->Program.Instructions.Next;
115 inst != &c->Program.Instructions; inst
79 get_used_temporaries_cb( void * userdata, struct rc_instruction * inst, rc_register_file file, unsigned int index, unsigned int mask) argument
171 struct rc_instruction * inst = memory_pool_malloc(&c->Pool, sizeof(struct rc_instruction)); local
184 rc_insert_instruction(struct rc_instruction * after, struct rc_instruction * inst) argument
195 struct rc_instruction * inst = rc_alloc_instruction(c); local
202 rc_remove_instruction(struct rc_instruction * inst) argument
214 struct rc_instruction * inst; local
[all...]
H A Dradeon_program_tex.h36 struct rc_instruction * inst,
H A Dradeon_pair_translate.c38 static void final_rewrite(struct rc_sub_instruction *inst) argument
42 switch(inst->Opcode) {
44 inst->SrcReg[2] = inst->SrcReg[1];
45 inst->SrcReg[1].File = RC_FILE_NONE;
46 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111;
47 inst->SrcReg[1].Negate = RC_MASK_NONE;
48 inst->Opcode = RC_OPCODE_MAD;
51 tmp = inst->SrcReg[2];
52 inst
87 classify_instruction(struct rc_sub_instruction * inst, int * needrgb, int * needalpha, int * istranscendent) argument
149 set_pair_instruction(struct r300_fragment_program_compiler *c, struct rc_pair_instruction * pair, struct rc_sub_instruction * inst) argument
328 check_opcode_support(struct r300_fragment_program_compiler *c, struct rc_sub_instruction *inst) argument
[all...]

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