Searched refs:kSRegSize (Results 1 - 15 of 15) sorted by relevance
| /external/vixl/examples/aarch64/ |
| H A D | neon-matrix-multiply.cc | 49 VRegister v_in = VRegister(in_column, kSRegSize);
|
| /external/vixl/src/aarch64/ |
| H A D | logic-aarch64.cc | 3955 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) { \
3997 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4027 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4082 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4097 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4115 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4150 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4181 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4208 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
4237 if (LaneSizeInBitsFromFormat(vform) == kSRegSize) {
[all...] |
| H A D | instructions-aarch64.h | 67 const unsigned kSRegSize = 32; member in namespace:vixl::aarch64
69 const unsigned kSRegSizeInBytes = kSRegSize / 8;
|
| H A D | operands-aarch64.h | 151 (size_ == kSRegSize) || (size_ == kDRegSize) ||
397 bool IsLaneSizeS() const { return GetLaneSizeInBits() == kSRegSize; }
456 const VRegister s##N(N, kSRegSize); \
|
| H A D | instructions-aarch64.cc | 548 return kSRegSize;
|
| H A D | macro-assembler-aarch64.h | 828 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are
857 PushSizeRegList(regs, kSRegSize, CPURegister::kVRegister);
860 PopSizeRegList(regs, kSRegSize, CPURegister::kVRegister);
883 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are
927 PeekSizeRegList(regs, offset, kSRegSize, CPURegister::kVRegister);
930 PokeSizeRegList(regs, offset, kSRegSize, CPURegister::kVRegister);
|
| H A D | disasm-aarch64.cc | 4035 case kSRegSize:
4317 reg_size = kSRegSize;
|
| H A D | assembler-aarch64.cc | 4637 case kSRegSize:
4660 case kSRegSize:
|
| H A D | simulator-aarch64.h | 1216 case kSRegSize:
|
| /external/v8/src/arm64/ |
| H A D | simulator-arm64.h | 453 if (sizeof(value) <= kSRegSize) {
480 DCHECK((sizeof(value) == kDRegSize) || (sizeof(value) == kSRegSize));
541 kPrintSRegValue = 1 << kSRegSize,
|
| H A D | simulator-arm64.cc | 1228 case kSRegSize:
1292 case kSRegSize:
1764 DCHECK(access_size == kSRegSize);
1794 DCHECK(access_size == kSRegSize);
1869 LogReadFP(address, kSRegSize, rt);
|
| H A D | constants-arm64.h | 55 const int kSRegSize = kSRegSizeInBits >> 3; member in namespace:v8::internal
|
| /external/vixl/test/aarch64/ |
| H A D | test-simulator-aarch64.cc | 203 VIXL_ASSERT((d_size == kDRegSize) || (d_size == kSRegSize));
204 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize));
323 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
456 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
605 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
744 VIXL_ASSERT((reg_size == kDRegSize) || (reg_size == kSRegSize));
872 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize));
924 VIXL_ASSERT((n_size == kDRegSize) || (n_size == kSRegSize));
1526 bool destructive = (vd_bits == kBRegSize) || (vd_bits == kSRegSize);
|
| H A D | test-utils-aarch64.cc | 322 s[i] = FPRegister(n, kSRegSize);
|
| H A D | test-assembler-aarch64.cc | 13900 ASSERT_EQUAL_FP64(RawbitsToDouble((base_d >> kSRegSize) |
13901 ((2 * base_d) << kSRegSize)),
13905 ASSERT_EQUAL_FP32(RawbitsToFloat((4 * base_d) >> kSRegSize), s17);
13999 VIXL_CHECK(array[12] == ((1 * low_base) << kSRegSize));
14000 VIXL_CHECK(array[13] == (((2 * low_base) << kSRegSize) | (1 * high_base)));
14001 VIXL_CHECK(array[14] == (((3 * low_base) << kSRegSize) | (2 * high_base)));
14002 VIXL_CHECK(array[15] == (((4 * low_base) << kSRegSize) | (3 * high_base)));
14003 VIXL_CHECK(array[16] == (((1 * low_base) << kSRegSize) | (4 * high_base)));
14004 VIXL_CHECK(array[17] == (((2 * low_base) << kSRegSize) | (1 * high_base)));
14005 VIXL_CHECK(array[18] == (((3 * low_base) << kSRegSize) | (
[all...] |
Completed in 375 milliseconds