/external/v8/src/arm64/ |
H A D | deoptimizer-arm64.cc | 112 (saved_registers.Count() * kXRegSize) + 116 const int kFPRegistersOffset = saved_registers.Count() * kXRegSize; 180 __ Drop(1 + (kSavedRegistersAreaSize / kXRegSize));
|
H A D | macro-assembler-arm64.h | 768 inline void Claim(int64_t count, uint64_t unit_size = kXRegSize); 770 uint64_t unit_size = kXRegSize); 771 inline void Drop(int64_t count, uint64_t unit_size = kXRegSize); 773 uint64_t unit_size = kXRegSize); 778 uint64_t unit_size = kXRegSize); 780 uint64_t unit_size = kXRegSize);
|
H A D | code-stubs-arm64.cc | 987 __ Ldr(temp, MemOperand(temp, -static_cast<int64_t>(kXRegSize))); 1660 MemOperand(last_match_offsets, kXRegSize * 2, PostIndex)); 3314 __ Poke(x19, (spill_offset + 0) * kXRegSize); 3315 __ Poke(x20, (spill_offset + 1) * kXRegSize); 3316 __ Poke(x21, (spill_offset + 2) * kXRegSize); 3317 __ Poke(x22, (spill_offset + 3) * kXRegSize); 3383 __ Peek(x19, (spill_offset + 0) * kXRegSize); 3384 __ Peek(x20, (spill_offset + 1) * kXRegSize); 3385 __ Peek(x21, (spill_offset + 2) * kXRegSize); 3386 __ Peek(x22, (spill_offset + 3) * kXRegSize); [all...] |
H A D | simulator-arm64.cc | 317 DCHECK(sizeof(uintptr_t) < 2 * kXRegSize); 318 intptr_t new_sp = sp() - 2 * kXRegSize; 320 reinterpret_cast<uintptr_t*>(new_sp + kXRegSize); 333 DCHECK(sizeof(uintptr_t) < 2 * kXRegSize); 334 set_sp(current_sp + 2 * kXRegSize); 895 static_assert((sizeof(T) == kWRegSize) || (sizeof(T) == kXRegSize), 1272 case kXRegSize: 1770 DCHECK(access_size == kXRegSize); 1800 DCHECK(access_size == kXRegSize); 1865 LogRead(address, kXRegSize, r [all...] |
H A D | macro-assembler-arm64.cc | 1286 MemOperand tos(csp, -2 * static_cast<int>(kXRegSize), PreIndex); 1310 MemOperand tos(csp, 2 * kXRegSize, PostIndex); 2766 Claim(extra_space + 1, kXRegSize); 2794 Add(scratch, csp, kXRegSize); 2915 Drop(StackHandlerConstants::kSize - kXRegSize, kByteSizeInBytes); 4490 __ sub(jssp, jssp, 4 * kXRegSize); 4491 __ sub(csp, csp, 4 * kXRegSize); 4492 __ stp(x1, cp, MemOperand(jssp, 0 * kXRegSize)); 4493 __ stp(fp, lr, MemOperand(jssp, 2 * kXRegSize));
|
H A D | constants-arm64.h | 51 const int kXRegSize = kXRegSizeInBits >> 3; member in namespace:v8::internal
|
/external/vixl/src/aarch64/ |
H A D | operands-aarch64.cc | 134 list.Combine(Register(30, kXRegSize)); 307 VIXL_ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize)); 499 VIXL_ASSERT(reg.GetSizeInBits() > static_cast<int>(kXRegSize));
|
H A D | instructions-aarch64.cc | 56 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); 128 unsigned reg_size = GetSixtyFourBits() ? kXRegSize : kWRegSize;
|
H A D | operands-aarch64.h | 145 return IsRegister() && ((size_ == kWRegSize) || (size_ == kXRegSize)) && 297 typedef internal::FixedSizeRegister<kXRegSize> XRegister; 659 static CPURegList GetCalleeSaved(unsigned size = kXRegSize); 665 static CPURegList GetCallerSaved(unsigned size = kXRegSize);
|
H A D | simulator-aarch64.cc | 304 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); 341 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); 348 if (reg_size == kXRegSize) { 461 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount); 464 offset = ExtendValue(kXRegSize, offset, mem_op.GetExtend(), shift_amount); 1084 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; 1124 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; 1141 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; 1151 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize : kWRegSize; 1171 unsigned reg_size = instr->GetSixtyFourBits() ? kXRegSize [all...] |
H A D | instructions-aarch64.h | 63 const unsigned kXRegSize = 64; member in namespace:vixl::aarch64 65 const unsigned kXRegSizeInBytes = kXRegSize / 8;
|
H A D | assembler-aarch64.h | 2706 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(imms)) || 2713 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) || 2721 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); 2723 VIXL_ASSERT((reg_size == kXRegSize) || IsUint6(imms + 3)); 2729 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); 2730 VIXL_ASSERT(((reg_size == kXRegSize) && IsUint6(immr)) || 2742 VIXL_ASSERT((reg_size == kWRegSize) || (reg_size == kXRegSize)); 2743 VIXL_ASSERT((reg_size == kXRegSize) || (bitn == 0));
|
H A D | disasm-aarch64.cc | 265 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize; 293 VIXL_ASSERT((reg_size == kXRegSize) || 305 if ((reg_size == kXRegSize) && 483 ((instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize) - 1; 4290 unsigned reg_size = kXRegSize; 4305 reg_size = kXRegSize; 4623 (instr->GetSixtyFourBits() == 1) ? kXRegSize : kWRegSize;
|
H A D | macro-assembler-aarch64.h | 703 Mov(rd, (rd.GetSizeInBits() == kXRegSize) ? ~imm : (~imm & kWRegMask)); 828 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are 846 void PushXRegList(RegList regs) { PushSizeRegList(regs, kXRegSize); } 847 void PopXRegList(RegList regs) { PopSizeRegList(regs, kXRegSize); } 883 // parameter. Only kXRegSize, kWRegSize, kDRegSize and kSRegSize are 909 PeekSizeRegList(regs, offset, kXRegSize); 912 PokeSizeRegList(regs, offset, kXRegSize);
|
H A D | macro-assembler-aarch64.cc | 1619 VIXL_ASSERT(dst.GetSizeInBits() <= kXRegSize); 1795 IsUintN(rd.GetSizeInBits() == kXRegSize ? kXRegSizeLog2 : kWRegSizeLog2, 2422 CPURegList(CPURegister::kRegister, kXRegSize, 1, arg_count);
|
H A D | assembler-aarch64.cc | 4204 VIXL_ASSERT(rn.GetSizeInBits() == kXRegSize); 4415 VIXL_ASSERT((reg_size == kXRegSize) || (reg_size == kWRegSize)); 4432 VIXL_ASSERT((width == kWRegSize) || (width == kXRegSize)); 4516 clz_a = CountLeadingZeros(a, kXRegSize); 4517 int clz_c = CountLeadingZeros(c, kXRegSize); 4538 clz_a = CountLeadingZeros(a, kXRegSize); 4571 uint64_t multiplier = multipliers[CountLeadingZeros(d, kXRegSize) - 57]; 4586 int clz_b = (b == 0) ? -1 : CountLeadingZeros(b, kXRegSize);
|
H A D | simulator-aarch64.h | 963 case kXRegSize: 1092 case kXRegSize:
|
/external/v8/src/regexp/arm64/ |
H A D | regexp-macro-assembler-arm64.h | 129 static const int kFirstCaptureOnStack = kSuccessCounter - kXRegSize;
|
H A D | regexp-macro-assembler-arm64.cc | 1375 int align_mask = (alignment / kXRegSize) - 1;
|
/external/vixl/test/aarch64/ |
H A D | test-utils-aarch64.cc | 288 x[i] = Register(n, kXRegSize); 339 Register xn(i, kXRegSize);
|
H A D | test-api-aarch64.cc | 266 Register r_x1(1, kXRegSize);
|
H A D | test-simulator-aarch64.cc | 871 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); 888 Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10); 923 VIXL_ASSERT((d_size == kXRegSize) || (d_size == kWRegSize)); 940 Register rd = (d_size == kXRegSize) ? Register(x10) : Register(w10);
|
H A D | test-assembler-aarch64.cc | 7689 CPURegList inputs(CPURegister::kRegister, kXRegSize, 10, 18); 14237 kXRegSize, 14242 kXRegSize, 14247 kXRegSize, 14252 kXRegSize, 14259 kXRegSize, 14264 kXRegSize, 14269 kXRegSize, 14274 kXRegSize, 14625 PushPopMixedMethodsHelper(claim, kXRegSize); [all...] |
/external/v8/src/full-codegen/arm64/ |
H A D | full-codegen-arm64.cc | 117 int receiver_offset = info->scope()->num_parameters() * kXRegSize; 444 __ Ldp(fp, lr, MemOperand(current_sp, 2 * kXRegSize, PostIndex)); 453 __ dc64(kXRegSize * arg_count); 663 int offset = -var->index() * kXRegSize; 1052 __ Peek(x10, 2 * kXRegSize); 1058 __ Peek(x2, 3 * kXRegSize); 1063 __ Peek(x1, 4 * kXRegSize); 1839 __ Peek(x1, (arg_count + 1) * kXRegSize); 1874 __ Peek(x1, arg_count * kXRegSize); 2103 __ Peek(x1, (argc + 1) * kXRegSize); [all...] |
/external/v8/src/builtins/arm64/ |
H A D | builtins-arm64.cc | 680 __ Peek(x1, 1 * kXRegSize); 2181 __ DropBySMI(x10, kXRegSize);
|