Searched refs:smaxv (Results 1 - 11 of 11) sorted by relevance

/external/llvm/test/MC/AArch64/
H A Dneon-across.s33 smaxv b0, v1.8b
34 smaxv b0, v1.16b
35 smaxv h0, v1.4h
36 smaxv h0, v1.8h
37 smaxv s0, v1.4s
39 // CHECK: smaxv b0, v1.8b // encoding: [0x20,0xa8,0x30,0x0e]
40 // CHECK: smaxv b0, v1.16b // encoding: [0x20,0xa8,0x30,0x4e]
41 // CHECK: smaxv h0, v1.4h // encoding: [0x20,0xa8,0x70,0x0e]
42 // CHECK: smaxv h0, v1.8h // encoding: [0x20,0xa8,0x70,0x4e]
43 // CHECK: smaxv s
[all...]
H A Dneon-diagnostics.s3773 smaxv s0, v1.2s
3780 // CHECK-ERROR: smaxv s0, v1.2s
3795 smaxv d0, v1.2d
3802 // CHECK-ERROR: smaxv d0, v1.2d
/external/capstone/suite/MC/AArch64/
H A Dneon-across.s.cs12 0x20,0xa8,0x30,0x0e = smaxv b0, v1.8b
13 0x20,0xa8,0x30,0x4e = smaxv b0, v1.16b
14 0x20,0xa8,0x70,0x0e = smaxv h0, v1.4h
15 0x20,0xa8,0x70,0x4e = smaxv h0, v1.8h
16 0x20,0xa8,0xb0,0x4e = smaxv s0, v1.4s
/external/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc1455 __ smaxv(b4, v5.V16B());
1456 __ smaxv(b23, v0.V8B());
1457 __ smaxv(h6, v0.V4H());
1458 __ smaxv(h24, v8.V8H());
1459 __ smaxv(s3, v16.V4S());
H A Dtest-simulator-aarch64.cc4406 DEFINE_TEST_NEON_ACROSS(smaxv, Basic)
/external/vixl/src/aarch64/
H A Dassembler-aarch64.h2093 void smaxv(const VRegister& vd, const VRegister& vn);
H A Dmacro-assembler-aarch64.h2345 V(smaxv, Smaxv) \
H A Dsimulator-aarch64.h2338 LogicVRegister smaxv(VectorFormat vform,
H A Dsimulator-aarch64.cc3715 smaxv(vf, rd, rn);
H A Dassembler-aarch64.cc3484 V(smaxv, NEON_SMAXV, true) \
H A Dlogic-aarch64.cc1506 LogicVRegister Simulator::smaxv(VectorFormat vform, function in class:vixl::aarch64::Simulator

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