Searched refs:sminv (Results 1 - 11 of 11) sorted by relevance
| /external/llvm/test/MC/AArch64/ |
| H A D | neon-across.s | 45 sminv b0, v1.8b
46 sminv b0, v1.16b
47 sminv h0, v1.4h
48 sminv h0, v1.8h
49 sminv s0, v1.4s
51 // CHECK: sminv b0, v1.8b // encoding: [0x20,0xa8,0x31,0x0e]
52 // CHECK: sminv b0, v1.16b // encoding: [0x20,0xa8,0x31,0x4e]
53 // CHECK: sminv h0, v1.4h // encoding: [0x20,0xa8,0x71,0x0e]
54 // CHECK: sminv h0, v1.8h // encoding: [0x20,0xa8,0x71,0x4e]
55 // CHECK: sminv s
[all...] |
| H A D | neon-diagnostics.s | 3774 sminv s0, v1.2s
3783 // CHECK-ERROR: sminv s0, v1.2s
3796 sminv d0, v1.2d
3805 // CHECK-ERROR: sminv d0, v1.2d
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| /external/capstone/suite/MC/AArch64/ |
| H A D | neon-across.s.cs | 17 0x20,0xa8,0x31,0x0e = sminv b0, v1.8b
18 0x20,0xa8,0x31,0x4e = sminv b0, v1.16b
19 0x20,0xa8,0x71,0x0e = sminv h0, v1.4h
20 0x20,0xa8,0x71,0x4e = sminv h0, v1.8h
21 0x20,0xa8,0xb1,0x4e = sminv s0, v1.4s
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| /external/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1472 __ sminv(b8, v6.V16B());
1473 __ sminv(b6, v18.V8B());
1474 __ sminv(h20, v1.V4H());
1475 __ sminv(h7, v17.V8H());
1476 __ sminv(s21, v4.V4S());
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| H A D | test-simulator-aarch64.cc | 4407 DEFINE_TEST_NEON_ACROSS(sminv, Basic)
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| /external/vixl/src/aarch64/ |
| H A D | assembler-aarch64.h | 2102 void sminv(const VRegister& vd, const VRegister& vn);
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| H A D | macro-assembler-aarch64.h | 2346 V(sminv, Sminv) \
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| H A D | simulator-aarch64.h | 2341 LogicVRegister sminv(VectorFormat vform,
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| H A D | simulator-aarch64.cc | 3718 sminv(vf, rd, rn);
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| H A D | assembler-aarch64.cc | 3485 V(sminv, NEON_SMINV, true) \
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| H A D | logic-aarch64.cc | 1514 LogicVRegister Simulator::sminv(VectorFormat vform, function in class:vixl::aarch64::Simulator
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