Searched refs:spilled (Results 1 - 11 of 11) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | ShrinkWrapping.cpp | 540 // Machine CFG around which CSRs must be spilled and restored. 546 /// addUsesForMEMERegion - add uses of CSRs spilled or restored in 670 /// calcSpillPlacements - determine which CSRs should be spilled 672 /// of changes to spilled reg sets. Add MBB to the set of blocks 712 // Reset all regs spilled in MBB that are also spilled in EntryBlock. 833 // Add uses for CSRs spilled or restored at branch, join points. 931 /// all CSRs spilled at MMBB are restored on all paths 934 /// all CSRs restored at MBB are spilled on all paths 948 CSRegSet spilled local 1002 CSRegSet spilled; local [all...] |
H A D | RegAllocPBQP.cpp | 145 /// spilled. Used to support stack slot coloring. 146 void addStackInterval(const LiveInterval *spilled,MachineRegisterInfo* mri); 491 void RegAllocPBQP::addStackInterval(const LiveInterval *spilled, argument 493 int stackSlot = vrm->getStackSlot(spilled->reg); 499 const TargetRegisterClass *RC = mri->getRegClass(spilled->reg); 510 LiveInterval &rhsInterval = lis->getInterval(spilled->reg); 614 // Filter out zero regs - they're for intervals that were spilled.
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H A D | RegAllocLinearScan.cpp | 1287 // Determine which intervals have to be spilled. 1290 // Set of spilled vregs (used later to rollback properly) 1291 SmallSet<unsigned, 8> spilled; local 1301 // track of the earliest start of all spilled live intervals since this will 1312 spilled.insert(sli->reg); 1325 // spilled live interval and undo each one, restoring the state of 1341 if (!spilled.count(i->reg)) 1348 if (!spilled.count(i->reg))
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/external/v8/src/compiler/ |
H A D | register-allocator.cc | 140 // Normally, spilled ranges do not need connecting moves, because the spill 141 // location has been assigned at definition. For ranges spilled in deferred 142 // blocks, that is not the case, so we need to connect the spilled children. 144 new (curr) LiveRangeBound(i, i->spilled()); 450 DCHECK(!HasRegisterAssigned() && !spilled()); 456 DCHECK(HasRegisterAssigned() && !spilled()); 462 DCHECK(!spilled()); 556 DCHECK(!spilled()); 560 DCHECK(spilled()); 1055 temp->set_spilled(first->spilled()); [all...] |
H A D | live-range-separator.cc | 147 if (child->spilled() ||
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H A D | graph-visualizer.cc | 599 } else if (range->spilled()) {
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H A D | register-allocator.h | 339 bool spilled() const { return SpilledField::decode(bits_); } function in class:v8::internal::compiler::LiveRange 370 // Can this live range be spilled at this position. 567 // If all the children of this range are spilled in deferred blocks, and if 568 // for any non-spilled child with a use position requiring a slot, that range 572 // deferred blocks. If so, we insert here spills for non-spilled ranges 1099 // Range is guaranteed to be spilled at least until position [until].
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/external/libffi/ |
H A D | texinfo.tex | 8358 % Deeper inside, just make sure that the saved insertions are not spilled
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/external/libmicrohttpd/doc/ |
H A D | texinfo.tex | 8358 % Deeper inside, just make sure that the saved insertions are not spilled
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/external/python/cpython2/Modules/_ctypes/libffi/ |
H A D | texinfo.tex | 8358 % Deeper inside, just make sure that the saved insertions are not spilled
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/external/python/cpython3/Modules/_ctypes/libffi/ |
H A D | texinfo.tex | 8358 % Deeper inside, just make sure that the saved insertions are not spilled
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