| /external/llvm/test/MC/AArch64/ |
| H A D | neon-shift-left-long.s | 8 sshll v0.8h, v1.8b, #3
9 sshll v0.4s, v1.4h, #3
10 sshll v0.2d, v1.2s, #3
15 // CHECK: sshll v0.8h, v1.8b, #3 // encoding: [0x20,0xa4,0x0b,0x0f]
16 // CHECK: sshll v0.4s, v1.4h, #3 // encoding: [0x20,0xa4,0x13,0x0f]
17 // CHECK: sshll v0.2d, v1.2s, #3 // encoding: [0x20,0xa4,0x23,0x0f]
|
| H A D | arm64-advsimd.s | 1545 sshll.8h v0, v0, #1
1547 sshll.4s v0, v0, #3
1549 sshll.2d v0, v0, #5
1717 ; CHECK: sshll.8h v0, v0, #1 ; encoding: [0x00,0xa4,0x09,0x0f]
1719 ; CHECK: sshll.4s v0, v0, #3 ; encoding: [0x00,0xa4,0x13,0x0f]
1721 ; CHECK: sshll.2d v0, v0, #5 ; encoding: [0x00,0xa4,0x25,0x0f]
1857 sshll v13.8h, v6.8b, #3
1858 sshll v14.4s, v7.4h, #2
1859 sshll v15.2d, v8.2s, #7
1920 ; CHECK: sshll
[all...] |
| H A D | neon-diagnostics.s | 1326 sshll v0.4s, v15.2s, #3
1332 sshll v0.8h, v1.8b, #-1
1333 sshll v0.8h, v1.8b, #9
1341 // CHECK-ERROR: sshll v0.4s, v15.2s, #3
1353 // CHECK-ERROR: sshll v0.8h, v1.8b, #-1
1356 // CHECK-ERROR: sshll v0.8h, v1.8b, #9
|
| /external/capstone/suite/MC/AArch64/ |
| H A D | neon-shift-left-long.s.cs | 2 0x20,0xa4,0x0b,0x0f = sshll v0.8h, v1.8b, #3
3 0x20,0xa4,0x13,0x0f = sshll v0.4s, v1.4h, #3
4 0x20,0xa4,0x23,0x0f = sshll v0.2d, v1.2s, #3
|
| /external/libjpeg-turbo/simd/ |
| H A D | jsimd_arm64_neon.S | 300 sshll v22.4s, v22.4h, #(CONST_BITS) /* tmp0l tmp0 = LEFT_SHIFT(z2 + z3, CONST_BITS); */
301 sshll v26.4s, v26.4h, #(CONST_BITS) /* tmp1l tmp1 = LEFT_SHIFT(z2 - z3, CONST_BITS); */
474 sshll v22.4s, v22.4h, #(CONST_BITS) /* tmp0l tmp0 = LEFT_SHIFT(z2 + z3, CONST_BITS); */
476 sshll v26.4s, v26.4h, #(CONST_BITS) /* tmp1l tmp1 = LEFT_SHIFT(z2 - z3, CONST_BITS); */
639 sshll v22.4s, v22.4h, #(CONST_BITS) /* tmp0l tmp0 = LEFT_SHIFT(z2 + z3, CONST_BITS); */
640 sshll v26.4s, v26.4h, #(CONST_BITS) /* tmp1l tmp1 = LEFT_SHIFT(z2 - z3, CONST_BITS); */
1274 sshll v15.4s, \x4, #15
1376 sshll v15.4s, v4.4h, #15
1377 sshll v30.4s, v5.4h, #15
|
| /external/valgrind/none/tests/arm64/ |
| H A D | fp_and_simd.c | 4331 GEN_SHIFT_TEST(sshll, 2d, 2s, 0)
4332 GEN_SHIFT_TEST(sshll, 2d, 2s, 15)
4333 GEN_SHIFT_TEST(sshll, 2d, 2s, 31)
4337 GEN_SHIFT_TEST(sshll, 4s, 4h, 0)
4338 GEN_SHIFT_TEST(sshll, 4s, 4h, 7)
4339 GEN_SHIFT_TEST(sshll, 4s, 4h, 15)
4343 GEN_SHIFT_TEST(sshll, 8h, 8b, 0)
4344 GEN_SHIFT_TEST(sshll, 8h, 8b, 3)
4345 GEN_SHIFT_TEST(sshll, 8h, 8b, 7)
7159 // sshll{
[all...] |
| H A D | fp_and_simd.stdout.exp | [all...] |
| /external/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 1760 __ sshll(v0.V2D(), v2.V2S(), 23);
1761 __ sshll(v11.V4S(), v8.V4H(), 8);
1762 __ sshll(v4.V8H(), v29.V8B(), 1);
|
| H A D | test-simulator-aarch64.cc | 4244 DEFINE_TEST_NEON_2OPIMM_LONG(sshll, Basic, TypeWidthFromZero)
|
| /external/vixl/src/aarch64/ |
| H A D | assembler-aarch64.cc | 3657 void Assembler::sshll(const VRegister& vd, const VRegister& vn, int shift) {
3670 sshll(vd, vn, 0);
|
| H A D | logic-aarch64.cc | 1649 LogicVRegister Simulator::sshll(VectorFormat vform, function in class:vixl::aarch64::Simulator
1677 return sshll(vform, dst, src, shift);
|
| H A D | assembler-aarch64.h | 2030 void sshll(const VRegister& vd, const VRegister& vn, int shift);
|
| H A D | macro-assembler-aarch64.h | 2461 V(sshll, Sshll) \
|
| H A D | simulator-aarch64.h | 2546 LogicVRegister sshll(VectorFormat vform,
|
| H A D | simulator-aarch64.cc | 5025 sshll(vf, rd, rn, left_shift);
|