Searched refs:sxtl2 (Results 1 - 8 of 8) sorted by relevance

/external/llvm/test/MC/AArch64/
H A Dneon-sxtl.s20 sxtl2 v0.8h, v1.16b
21 sxtl2 v0.4s, v1.8h
22 sxtl2 v0.2d, v1.4s
/external/vixl/src/aarch64/
H A Dlogic-aarch64.cc1668 LogicVRegister extendedreg = sxtl2(vform, temp2, src);
2550 LogicVRegister Simulator::sxtl2(VectorFormat vform, function in class:vixl::aarch64::Simulator
2906 sxtl2(vform, temp1, src1);
2907 sxtl2(vform, temp2, src2);
2929 sxtl2(vform, temp, src2);
2998 sxtl2(vform, temp1, src1);
2999 sxtl2(vform, temp2, src2);
3021 sxtl2(vform, temp, src2);
3068 sxtl2(vform, temp1, src1);
3069 sxtl2(vfor
[all...]
H A Dassembler-aarch64.h2039 void sxtl2(const VRegister& vd, const VRegister& vn);
H A Dmacro-assembler-aarch64.h2355 V(sxtl2, Sxtl2) \
H A Dsimulator-aarch64.h2353 LogicVRegister sxtl2(VectorFormat vform,
H A Dassembler-aarch64.cc3674 void Assembler::sxtl2(const VRegister& vd, const VRegister& vn) {
/external/libhevc/common/arm64/
H A Dihevc_intra_pred_luma_vert.s206 sxtl2 v28.8h, v26.16b
/external/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc2133 __ sxtl2(v6.V2D(), v7.V4S());
2134 __ sxtl2(v9.V4S(), v27.V8H());
2135 __ sxtl2(v16.V8H(), v16.V16B());

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