Searched refs:uqshrn (Results 1 - 15 of 15) sorted by relevance

/external/llvm/test/MC/AArch64/
H A Dneon-scalar-shift-imm.s135 uqshrn b12, h10, #7
136 uqshrn h10, s14, #5
137 uqshrn s10, d12, #13
139 // CHECK: uqshrn b12, h10, #7 // encoding: [0x4c,0x95,0x09,0x7f]
140 // CHECK: uqshrn h10, s14, #5 // encoding: [0xca,0x95,0x1b,0x7f]
141 // CHECK: uqshrn s10, d12, #13 // encoding: [0x8a,0x95,0x33,0x7f]
H A Dneon-simd-shift.s350 uqshrn v0.8b, v1.8h, #3
351 uqshrn v0.4h, v1.4s, #3
352 uqshrn v0.2s, v1.2d, #3
357 // CHECK: uqshrn v0.8b, v1.8h, #3 // encoding: [0x20,0x94,0x0d,0x2f]
358 // CHECK: uqshrn v0.4h, v1.4s, #3 // encoding: [0x20,0x94,0x1d,0x2f]
359 // CHECK: uqshrn v0.2s, v1.2d, #3 // encoding: [0x20,0x94,0x3d,0x2f]
H A Darm64-advsimd.s1389 uqshrn b0, h0, #1
1390 uqshrn h0, s0, #2
1391 uqshrn s0, d0, #3
1438 ; CHECK: uqshrn b0, h0, #1 ; encoding: [0x00,0x94,0x0f,0x7f]
1439 ; CHECK: uqshrn h0, s0, #2 ; encoding: [0x00,0x94,0x1e,0x7f]
1440 ; CHECK: uqshrn s0, d0, #3 ; encoding: [0x00,0x94,0x3d,0x7f]
1582 uqshrn.8b v0, v0, #1
1584 uqshrn.4h v0, v0, #3
1586 uqshrn.2s v0, v0, #5
1754 ; CHECK: uqshrn
[all...]
H A Dneon-diagnostics.s1952 uqshrn v0.8b, v1.8b, #3
1953 uqshrn v0.4h, v1.4h, #3
1954 uqshrn v0.2s, v1.2s, #3
1960 // CHECK-ERROR: uqshrn v0.8b, v1.8b, #3
1963 // CHECK-ERROR: uqshrn v0.4h, v1.4h, #3
1966 // CHECK-ERROR: uqshrn v0.2s, v1.2s, #3
5113 uqshrn b12, h10, #99
5114 uqshrn h10, s14, #99
5115 uqshrn s10, d12, #99
5118 // CHECK-ERROR: uqshrn b1
[all...]
/external/capstone/suite/MC/AArch64/
H A Dneon-scalar-shift-imm.s.cs28 0x4c,0x95,0x09,0x7f = uqshrn b12, h10, #7
29 0xca,0x95,0x1b,0x7f = uqshrn h10, s14, #5
30 0x8a,0x95,0x33,0x7f = uqshrn s10, d12, #13
H A Dneon-simd-shift.s.cs122 0x20,0x94,0x0d,0x2f = uqshrn v0.8b, v1.8h, #3
123 0x20,0x94,0x1d,0x2f = uqshrn v0.4h, v1.4s, #3
124 0x20,0x94,0x3d,0x2f = uqshrn v0.2s, v1.2d, #3
/external/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc2354 __ uqshrn(b21, h27, 7);
2355 __ uqshrn(h28, s26, 11);
2356 __ uqshrn(s13, d31, 17);
2357 __ uqshrn(v21.V2S(), v16.V2D(), 8);
2358 __ uqshrn(v24.V4H(), v24.V4S(), 2);
2359 __ uqshrn(v5.V8B(), v1.V8H(), 8);
H A Dtest-simulator-aarch64.cc4259 DEFINE_TEST_NEON_2OPIMM_NARROW(uqshrn, Basic, TypeWidth)
4291 DEFINE_TEST_NEON_2OPIMM_SCALAR_NARROW(uqshrn, Basic, TypeWidth)
/external/valgrind/none/tests/arm64/
H A Dfp_and_simd.stdout.exp[all...]
/external/vixl/src/aarch64/
H A Dsimulator-aarch64.cc4900 uqshrn(vf, rd, rn, right_shift);
5054 uqshrn(vf, rd, rn, right_shift);
H A Dassembler-aarch64.h2284 void uqshrn(const VRegister& vd, const VRegister& vn, int shift);
H A Dmacro-assembler-aarch64.h2468 V(uqshrn, Uqshrn) \
H A Dsimulator-aarch64.h2670 LogicVRegister uqshrn(VectorFormat vform,
H A Dassembler-aarch64.cc3827 void Assembler::uqshrn(const VRegister& vd, const VRegister& vn, int shift) {
H A Dlogic-aarch64.cc2715 LogicVRegister Simulator::uqshrn(VectorFormat vform, function in class:vixl::aarch64::Simulator

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