| /external/llvm/test/MC/AArch64/ |
| H A D | neon-shift-left-long.s | 28 ushll2 v0.8h, v1.16b, #3
29 ushll2 v0.4s, v1.8h, #3
30 ushll2 v0.2d, v1.4s, #3
35 // CHECK: ushll2 v0.8h, v1.16b, #3 // encoding: [0x20,0xa4,0x0b,0x6f]
36 // CHECK: ushll2 v0.4s, v1.8h, #3 // encoding: [0x20,0xa4,0x13,0x6f]
37 // CHECK: ushll2 v0.2d, v1.4s, #3 // encoding: [0x20,0xa4,0x23,0x6f]
|
| H A D | arm64-advsimd.s | 1603 ushll2.8h v0, v0, #2
1605 ushll2.4s v0, v0, #4
1607 ushll2.2d v0, v0, #6
1775 ; CHECK: ushll2.8h v0, v0, #2 ; encoding: [0x00,0xa4,0x0a,0x6f]
1777 ; CHECK: ushll2.4s v0, v0, #4 ; encoding: [0x00,0xa4,0x14,0x6f]
1779 ; CHECK: ushll2.2d v0, v0, #6 ; encoding: [0x00,0xa4,0x26,0x6f]
1861 ushll2 v10.8h, v3.16b, #6
1862 ushll2 v11.4s, v4.8h, #5
1863 ushll2 v12.2d, v5.4s, #4
1923 ; CHECK: ushll2
[all...] |
| H A D | neon-diagnostics.s | 1329 ushll2 v1.4s, v25.4s, #7
1338 ushll2 v0.2d, v1.4s, #33
1350 // CHECK-ERROR: ushll2 v1.4s, v25.4s, #7
1371 // CHECK-ERROR: ushll2 v0.2d, v1.4s, #33
|
| /external/capstone/suite/MC/AArch64/ |
| H A D | neon-shift-left-long.s.cs | 11 0x20,0xa4,0x0b,0x6f = ushll2 v0.8h, v1.16b, #3
12 0x20,0xa4,0x13,0x6f = ushll2 v0.4s, v1.8h, #3
13 0x20,0xa4,0x23,0x6f = ushll2 v0.2d, v1.4s, #3
|
| /external/valgrind/none/tests/arm64/ |
| H A D | fp_and_simd.c | 4352 GEN_SHIFT_TEST(ushll2, 2d, 4s, 0)
4353 GEN_SHIFT_TEST(ushll2, 2d, 4s, 15)
4354 GEN_SHIFT_TEST(ushll2, 2d, 4s, 31)
4358 GEN_SHIFT_TEST(ushll2, 4s, 8h, 0)
4359 GEN_SHIFT_TEST(ushll2, 4s, 8h, 7)
4360 GEN_SHIFT_TEST(ushll2, 4s, 8h, 15)
4364 GEN_SHIFT_TEST(ushll2, 8h, 16b, 0)
4365 GEN_SHIFT_TEST(ushll2, 8h, 16b, 3)
4366 GEN_SHIFT_TEST(ushll2, 8h, 16b, 7)
|
| H A D | fp_and_simd.stdout.exp | [all...] |
| /external/vixl/test/aarch64/ |
| H A D | test-trace-aarch64.cc | 2428 __ ushll2(v8.V2D(), v29.V4S(), 7);
2429 __ ushll2(v29.V4S(), v9.V8H(), 2);
2430 __ ushll2(v5.V8H(), v24.V16B(), 6);
|
| /external/vixl/src/aarch64/ |
| H A D | assembler-aarch64.cc | 3685 void Assembler::ushll2(const VRegister& vd, const VRegister& vn, int shift) {
3697 ushll2(vd, vn, 0);
|
| H A D | assembler-aarch64.h | 2045 void ushll2(const VRegister& vd, const VRegister& vn, int shift);
|
| H A D | macro-assembler-aarch64.h | 2473 V(ushll2, Ushll2) \
|
| H A D | simulator-aarch64.h | 2564 LogicVRegister ushll2(VectorFormat vform,
|
| H A D | simulator-aarch64.cc | 5031 ushll2(vf, rd, rn, left_shift);
|
| H A D | logic-aarch64.cc | 1701 LogicVRegister Simulator::ushll2(VectorFormat vform, function in class:vixl::aarch64::Simulator
|