/external/llvm/lib/Target/AArch64/ |
H A D | AArch64RedundantCopyElimination.cpp | 126 unsigned DefReg = MI->getOperand(0).getReg(); local 130 !MRI->isReserved(DefReg) && 131 (TargetReg == DefReg || TRI->isSuperRegister(DefReg, TargetReg))) { 140 TRI->isSubRegister(SmallestDef, DefReg) ? DefReg : SmallestDef;
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | PHIElimination.cpp | 135 unsigned DefReg = DefMI->getOperand(0).getReg(); local 136 if (MRI->use_nodbg_empty(DefReg))
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H A D | TargetInstrInfoImpl.cpp | 368 unsigned DefReg = MI->getOperand(0).getReg(); local 374 if (TargetRegisterInfo::isVirtualRegister(DefReg) && 375 MI->getOperand(0).getSubReg() && MI->readsVirtualRegister(DefReg)) 439 if (MO.isDef() && Reg != DefReg)
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H A D | LiveVariables.cpp | 214 unsigned DefReg = MO.getReg(); local 215 if (TRI->isSubRegister(Reg, DefReg)) { 216 PartDefRegs.insert(DefReg); 217 for (const unsigned *SubRegs = TRI->getSubRegisters(DefReg);
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H A D | TailDuplication.cpp | 382 unsigned DefReg = MI->getOperand(0).getReg(); local 386 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); 387 LocalVRMap.insert(std::make_pair(DefReg, SrcReg)); 393 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg)) 394 AddSSAUpdateEntry(DefReg, NewDef, PredBB);
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H A D | MachineVerifier.cpp | 637 unsigned DefReg = MI->getOperand(defIdx).getReg(); local 638 if (Reg == DefReg)
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H A D | TwoAddressInstructionPass.cpp | 189 unsigned DefReg = 0; local 206 if (DefReg) 209 DefReg = MO.getReg(); 257 if (DefReg == MOReg)
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/external/llvm/lib/CodeGen/ |
H A D | DetectDeadLanes.cpp | 256 unsigned DefReg = Def.getReg(); local 257 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); 291 unsigned DefReg = Def.getReg(); local 292 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) 294 unsigned DefRegIdx = TargetRegisterInfo::virtReg2Index(DefReg); 434 unsigned DefReg = Def.getReg(); local 437 if (TargetRegisterInfo::isVirtualRegister(DefReg)) { 441 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); 476 unsigned DefReg = Def.getReg(); local 477 if (!TargetRegisterInfo::isVirtualRegister(DefReg)) [all...] |
H A D | ImplicitNullChecks.cpp | 495 unsigned DefReg = NoRegister; local 497 DefReg = LoadMI->defs().begin()->getReg(); 502 auto MIB = BuildMI(MBB, DL, TII->get(TargetOpcode::FAULTING_LOAD_OP), DefReg)
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H A D | PHIElimination.cpp | 159 unsigned DefReg = DefMI->getOperand(0).getReg(); local 160 if (MRI->use_nodbg_empty(DefReg)) {
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H A D | LiveVariables.cpp | 218 unsigned DefReg = MO.getReg(); local 219 if (TRI->isSubRegister(Reg, DefReg)) { 220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true);
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H A D | TailDuplicator.cpp | 308 unsigned DefReg = MI->getOperand(0).getReg(); local 313 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); 314 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); 320 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg)) 321 addSSAUpdateEntry(DefReg, NewDef, PredBB);
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H A D | TargetInstrInfo.cpp | 832 unsigned DefReg = MI.getOperand(0).getReg(); local 838 if (TargetRegisterInfo::isVirtualRegister(DefReg) && 839 MI.getOperand(0).getSubReg() && MI.readsVirtualRegister(DefReg)) 889 if (MO.isDef() && Reg != DefReg)
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H A D | TwoAddressInstructionPass.cpp | 199 unsigned DefReg = 0; local 215 if (DefReg) 218 DefReg = MO.getReg(); 277 if (DefReg == MOReg)
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/external/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 221 unsigned DefReg = MODef.getReg(); local 222 if (!TRI->isVirtualRegister(DefReg)) {
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H A D | ARMLoadStoreOptimizer.cpp | 840 unsigned DefReg = MO.getReg(); local 842 if (std::find(ImpDefs.begin(), ImpDefs.end(), DefReg) != ImpDefs.end()) 845 if (MI->readsRegister(DefReg)) 847 ImpDefs.push_back(DefReg);
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/external/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.cpp | 354 int DefReg = 0; local 358 DefReg = MO.getReg(); 377 if (DefReg != Reg) { 392 if (DefReg!= SpReg) {
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCVSXSwapRemoval.cpp | 665 unsigned DefReg = MI->getOperand(0).getReg(); local 671 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { 695 unsigned DefReg = DefMI->getOperand(0).getReg(); local 714 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { 753 unsigned DefReg = MI->getOperand(0).getReg(); local 755 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) {
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/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyRegStackify.cpp | 392 unsigned DefReg = MO.getReg(); local 393 if (!TargetRegisterInfo::isVirtualRegister(DefReg) || 394 !MFI.isVRegStackified(DefReg)) 396 assert(MRI.hasOneUse(DefReg)); 397 const MachineOperand &NewUse = *MRI.use_begin(DefReg); 528 /// DefReg = INST ... // Def (to become the new Insert) 529 /// TeeReg, Reg = TEE_LOCAL_... DefReg 534 /// with DefReg and TeeReg stackified. This eliminates a get_local from the 549 unsigned DefReg = MRI.createVirtualRegister(RegClass); local 554 .addReg(DefReg, getUndefRegStat [all...] |