| /external/llvm/test/MC/ARM/ |
| H A D | basic-arm-instructions-v8.s | 6 @ HLT
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| H A D | basic-thumb2-instructions-v8.s | 6 @ HLT (in ARMv8 only)
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| H A D | thumb-diagnostics.s | 45 @ Out of range immediates for v8 HLT instruction.
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| /external/v8/src/arm64/ |
| H A D | disasm-arm64.cc | 1223 case HLT: mnemonic = "hlt"; break;
1475 case 'D': { // IDebug - HLT and BRK instructions.
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| H A D | simulator-arm64.cc | 470 HLT | Assembler::ImmException(kImmExceptionIsRedirectedCall));
3658 case HLT: {
3725 DCHECK(pc_->Mask(ExceptionMask) == HLT);
3756 DCHECK((instr->Mask(ExceptionMask) == HLT) &&
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| H A D | constants-arm64.h | 676 HLT = ExceptionFixed | 0x00400000, enumerator in enum:v8::internal::ExceptionOp
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| H A D | assembler-arm64.cc | 934 if ((instr->Mask(ExceptionMask) == HLT) &&
943 if ((instr->Mask(ExceptionMask) == HLT) &&
2301 Emit(HLT | ImmException(code));
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| /external/vixl/src/aarch64/ |
| H A D | simulator-aarch64.cc | 2943 case HLT:
5174 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) &&
5185 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) &&
5212 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) &&
5233 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) &&
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| H A D | debugger-aarch64.cc | 654 case HLT:
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| H A D | constants-aarch64.h | 723 HLT = ExceptionFixed | 0x00400000, enumerator in enum:vixl::aarch64::ExceptionOp
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| H A D | disasm-aarch64.cc | 1819 case HLT:
4470 case 'D': { // IDebug - HLT and BRK instructions.
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| H A D | assembler-aarch64.cc | 3993 Emit(HLT | ImmException(code));
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| /external/capstone/arch/X86/ |
| H A D | X86GenAsmWriter1_reduce.inc | 522 3347U, // HLT
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| H A D | X86GenAsmWriter_reduce.inc | 522 5488U, // HLT
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| H A D | X86GenAsmWriter.inc | 856 15233U, // HLT
7127 0U, // HLT
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| H A D | X86GenAsmWriter1.inc | 856 12142U, // HLT
7127 0U, // HLT
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| /external/mesa3d/src/mesa/x86/ |
| H A D | assyntax.h | 434 #define HLT CHOICE(hlt, hlt, hlt) macro
1163 #define HLT hlt macro
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| /external/capstone/arch/AArch64/ |
| H A D | AArch64GenAsmWriter.inc | 735 22720U, // HLT
3127 0U, // HLT
5230 // BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, SMC, SVC
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| /external/capstone/arch/ARM/ |
| H A D | ARMGenAsmWriter.inc | 129 414537U, // HLT
2922 0U, // HLT
6238 // BKPT, BL, BLX, BLXi, BX, CPS1p, HLT, RFEDA, RFEDB, RFEIA, RFEIB, SRSDA...
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| H A D | ARMGenInstrInfo.inc | 3306 { 112, 1, 0, 0, 4, 0|(1<<MCID_UnmodeledSideEffects), 0xd00ULL, nullptr, nullptr, OperandInfo5,0,nullptr }, // Inst #112 = HLT
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86GenInstrInfo.inc | 811 HLT = 795,
4979 { 795, 0, 0, 0, 0, "HLT", 0|(1<<MCID::UnmodeledSideEffects), 0x1e8000001ULL, NULL, NULL, 0 }, // Inst #795 = HLT
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| H A D | X86GenAsmWriter.inc | 808 3342U, // HLT
5881 "HADDPDrr\000HADDPSrm\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUB"
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| H A D | X86GenAsmWriter1.inc | 808 2674U, // HLT
6624 "HADDPDrr\000HADDPSrm\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUB"
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| H A D | X86GenAsmMatcher.inc | 3582 { X86::HLT, "hlt", Convert, { }, 0},
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 6133 Inst.getOpcode() == ARM::HLT;
6188 // NOTE: BKPT and HLT instructions have the interesting property of being
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